SNLA434 November   2023 DP83TC812R-Q1 , DP83TD510E , DP83TG720R-Q1 , LMK1C1103 , LMK1C1104 , LMK5B12204 , LMK6C

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
  5. 2Power Supply
    1. 2.1 Internal Supply Rails
    2. 2.2 External Supply Lines
    3. 2.3 Requirements for PoDL
    4. 2.4 Clocking
      1. 2.4.1 Topology 1
      2. 2.4.2 Topology 2
  6. 3Summary
  7. 4References

Topology 1

Using a crystal to clock the IC’s, it is important to read the crystal data sheet and the IC’s data sheet to confirm that the two parts are able to work together. With that being done, a typical crystal connection can look like the following.

R2 and R3 is the series termination of the crystal and R1 is the parallel termination of the crystal, these resistors can be added to the circuit but can also be removed to achieve smaller traces. However, the use of those resistors can be mandated from the IC data sheet.

The C1 and C2 capacitors are important to use C0G/NP0 capacitors for proper performance on system level.

GUID-20231108-SS0I-WF8W-S7XZ-XVF3RGBC6QT9-low.png Figure 2-13 Clock Layout -
Option 1
GUID-20231108-SS0I-XPTZ-96JC-HXJMX0QJHLJH-low.png Figure 2-14 Clock Layout - Option 2
GUID-20231108-SS0I-8ZG8-V3SM-SDTX8JBH6W1J-low.png Figure 2-15 Clock Layout - Option 3

As shown in the layout examples, the suggestion is to have the crystal ground connected on an island, keeping noise away from the system ground. However there is an importance to keep this crystal ground kelvin connected to the system ground to make sure this island ground is not susceptible to high-frequency ringing.