TIDUF55 November 2023
The key performances of the TIDA-010253 were tested in a TI lab, the end equipment used and test processes and results are described in this section.
Table 3-1 describes the connections for TIDA-010253 board.
CONNECTOR AND PIN ASSIGNMENTS | FUNCTION OR SCHEMATIC NET |
NOTES |
---|---|---|
J26-1 | PGND | Negative terminal of power supply |
J26-2 | PGND | Negative terminal of power supply |
J26-3 | VBATI | Positive terminal of power
supply, rated voltage is 24 V, working voltage is 18 V–32 V |
J26-4 | VBATI | Positive terminal of power supply, rated voltage is
24 V, working voltage is 18 V–32 V |
CONNECTOR AND PIN ASSIGNMENTS | FUNCTION OR SCHEMATIC NET |
NOTES |
---|---|---|
J16-1 | PGND | Negative terminal of relay power supply |
J16-2 | 24V_CONN | Positive terminal of relay power supply, rated
voltage is 24 V, working voltage is 18 V–32 V |
CONNECTOR AND PIN ASSIGNMENTS | FUNCTION OR SCHEMATIC NET |
NOTES |
---|---|---|
J22-1 | LS_OUT1 | Reserved low side power switch terminal1 between PGND and coil |
J22-2 | LS_OUT_COM | Common low side power switch terminal between PGND and coil |
J22-3 | HS_OUT1 | High-side power switch terminal1 between relay power supply and coil |
CONNECTOR AND PIN ASSIGNMENTS | FUNCTION OR SCHEMATIC NET |
NOTES |
---|---|---|
J21-1 | LS_OUT2 | Reserved low side power switch terminal2 between PGND and coil |
J21-2 | LS_OUT_COM | Common low side power switch terminal between PGND and coil |
J21-3 | HS_OUT2 | High side power switch terminal2 between relay power supply and coil |
CONNECTOR AND PIN ASSIGNMENTS | FUNCTION OR SCHEMATIC NET |
NOTES |
---|---|---|
J24-1 | LS_OUT3 | Reserved low side power switch terminal3 between PGND and coil |
J24-2 | LS_OUT_COM | Common low side power switch terminal between PGND and coil |
J24-3 | HS_OUT3 | High side power switch terminal3 between relay power supply and coil |
CONNECTOR AND PIN ASSIGNMENTS | FUNCTION OR SCHEMATIC NET |
NOTES |
---|---|---|
J23-1 | LS_OUT4 | Reserved low side power switch terminal4 between PGND and coil |
J23-2 | LS_OUT_COM | Common low side power switch terminal between PGND and coil |
J23-3 | HS_OUT4 | High side power switch terminal4 between relay power supply and coil |
CONNECTOR AND PIN ASSIGNMENTS | FUNCTION OR SCHEMATIC NET |
NOTES |
---|---|---|
J4-3 | BQ0_COMHP_ISO | COM high-side positive |
J4-4 | BQ0_COMHN_ISO | COM high-side negative |
CONNECTOR AND PIN ASSIGNMENTS | FUNCTION OR SCHEMATIC NET |
NOTES |
---|---|---|
J8-1 | BQ0_COMLN_ISO | COM low-side negative |
J8-2 | BQ0_COMLP_ISO | COM low-side positive |
CONNECTOR AND PIN ASSIGNMENTS | FUNCTION OR SCHEMATIC NET |
NOTES |
---|---|---|
J9-3 | BQ1_COMHP_ISO | COM high-side positive |
J9-4 | BQ1_COMHN_ISO | COM high-side negative |
CONNECTOR AND PIN ASSIGNMENTS | FUNCTION OR SCHEMATIC NET |
NOTES |
---|---|---|
J13-1 | BQ1_COMLN_ISO | COM low-side negative |
J13-2 | BQ1_COMLP_ISO | COM low-side positive |
CONNECTOR AND PIN ASSIGNMENTS | FUNCTION OR SCHEMATIC NET |
NOTES |
---|---|---|
J19-1 | GND | BCU ground |
J19-2 | VDDIO | 3.3 V for I/Os and power supply for peripheral device |
J19-3 | EXT_I2C2_GPIO | GPIO for I2C2 control |
J19-4 | EXT_I2C1_GPIO | GPIO for I2C1 control |
J19-5 | I2C2_SDA | Serial Data Line for I2C2, connected to HDC3020 |
J19-6 | I2C2_SCL | Serial Clock Line for I2C2, connected to HDC3020 |
J19-7 | I2C1_SDA | Serial Data Line for I2C1, connected to BQ32002 |
J19-8 | I2C1_SCL | Serial Clock Line for I2C1, connected to BQ32002 |
CONNECTOR AND PIN ASSIGNMENTS | FUNCTION OR SCHEMATIC NET |
NOTES |
---|---|---|
J25-1 | VDDIO | 3.3 V for I/Os and power supply for peripheral device |
J25-2 | VDDIO | 3.3 V for I/Os and power supply for peripheral device |
J25-3 | UIR_OC1 | Overcurrent alarm1 |
J25-5 | UIR_OC2 | Overcurrent alarm2 |
J25-7 | UIR_nFAULT | SPI peripheral device fault alarm |
J25-8 | VCC5V | 5-V power supply for peripheral device |
J25-9 | VCC5V | 5-V power supply for peripheral device |
J25-10 | VCC5V | 5-V power supply for peripheral device |
J25-11 | UIR_SPI_MOSI | SPI Master Output, Slave Input |
J25-13 | UIR_SPI_MISO | SPI Master Input, Slave Output |
J25-15 | UIR_SPI_CS | SPI Chip Select |
J25-17 | UIR_SPI_CLK | SPI Clock |
J25-18 | UIR_SN65_EN | Enable pin to additional power supply for peripheral device |
J25-19 | GND | BCU ground |
J25-20 | GND | BCU ground |
CONNECTOR AND PIN ASSIGNMENTS | FUNCTION OR SCHEMATIC NET | NOTES |
---|---|---|
J1-2 | CANH0 | CAN0_High |
J1-3 | CANL0 | CAN0_Low |
J1-4 | GND0 | CAN0_GND |
CONNECTOR AND PIN ASSIGNMENTS | FUNCTION OR SCHEMATIC NET | NOTES |
---|---|---|
J2-2 | CANH1 | CAN1_High |
J2-3 | CANL1 | CAN1_Low |
J2-4 | GND1 | CAN1_GND |
CONNECTOR AND PIN ASSIGNMENTS | FUNCTION OR SCHEMATIC NET | NOTES |
---|---|---|
J30-2 | CANH2 | CAN2_High |
J30-3 | CANL2 | CAN2_Low |
J30-4 | GND4 | CAN4_GND |
CONNECTOR AND PIN ASSIGNMENTS | FUNCTION OR SCHEMATIC NET | NOTES |
---|---|---|
J30-2 | RS485_B | RS-485 Negative |
J30-3 | RS485_A | RS485_Positive |
J30-4 | GND2 | RS485_GND |