LM98725

AKTIV

3-kanaliges AFE, 16 Bit, 81 MSPS, mit LVDS/CMOS-Ausgang & integriertem CCD/CIS-Sensor-Timing-Generat

Produktdetails

Resolution (Bits) 16 Number of channels 3 Sample rate (Msps) 81 Gain (min) (dB) -4.2 Gain (max) (dB) 18.4 Pd (typ) (mW) 755 Supply voltage (max) (V) 3.3 Operating temperature range (°C) 0 to 70 Output data format CMOS, LVDS Rating Catalog
Resolution (Bits) 16 Number of channels 3 Sample rate (Msps) 81 Gain (min) (dB) -4.2 Gain (max) (dB) 18.4 Pd (typ) (mW) 755 Supply voltage (max) (V) 3.3 Operating temperature range (°C) 0 to 70 Output data format CMOS, LVDS Rating Catalog
TSSOP (DGG) 56 113.4 mm² 14 x 8.1
  • LVDS/CMOS Outputs
  • LVDS/CMOS/Crystal Clock Source with PLL
    Multiplication
  • Integrated Flexible Spread Spectrum Clock
    Generation
  • CDS or S/H Processing for CCD or CIS Sensors
  • Independent Gain/Offset Correction for Each
    Channel
  • Automatic per-Channel Gain and Offset
    Calibration
  • Programmable Input Clamp Voltage
  • Flexible CCD/CIS Sensor Timing Generator
  • LVDS/CMOS Outputs
  • LVDS/CMOS/Crystal Clock Source with PLL
    Multiplication
  • Integrated Flexible Spread Spectrum Clock
    Generation
  • CDS or S/H Processing for CCD or CIS Sensors
  • Independent Gain/Offset Correction for Each
    Channel
  • Automatic per-Channel Gain and Offset
    Calibration
  • Programmable Input Clamp Voltage
  • Flexible CCD/CIS Sensor Timing Generator

The LM98725 is a fully integrated, high performance 16-Bit, 81 MSPS signal processing solution for digital color copiers, scanners, and other image processing applications. The LM98725 achieves high-speed signal throughput with an innovative architecture utilizing Correlated Double Sampling (CDS), typically employed with CCD arrays, or Sample and Hold (S/H) inputs (for higher speed CCD or CMOS image sensors). The signal paths utilize 8 bit Programmable Gain Amplifiers (PGA), a ±9-Bit offset correction DAC, and independently controlled Digital Black Level correction loops for each input. The independently programmed PGA and offset DAC allow unique values of gain and offset for each of the three analog inputs. The signals are then routed to a 81 MHz high performance analog-to-digital converter (ADC). The fully differential processing channel shows exceptional noise immunity with a very low noise floor of –74 dB. The 16-bit ADC has excellent dynamic performance making the LM98725 transparent in the image reproduction chain.

A very flexible integrated Spread Spectrum Clock Generation (SSCG) modulator is included to assist with EM compliance and reduce system costs.

The LM98725 is a fully integrated, high performance 16-Bit, 81 MSPS signal processing solution for digital color copiers, scanners, and other image processing applications. The LM98725 achieves high-speed signal throughput with an innovative architecture utilizing Correlated Double Sampling (CDS), typically employed with CCD arrays, or Sample and Hold (S/H) inputs (for higher speed CCD or CMOS image sensors). The signal paths utilize 8 bit Programmable Gain Amplifiers (PGA), a ±9-Bit offset correction DAC, and independently controlled Digital Black Level correction loops for each input. The independently programmed PGA and offset DAC allow unique values of gain and offset for each of the three analog inputs. The signals are then routed to a 81 MHz high performance analog-to-digital converter (ADC). The fully differential processing channel shows exceptional noise immunity with a very low noise floor of –74 dB. The 16-bit ADC has excellent dynamic performance making the LM98725 transparent in the image reproduction chain.

A very flexible integrated Spread Spectrum Clock Generation (SSCG) modulator is included to assist with EM compliance and reduce system costs.

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Technische Dokumentation

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* Data sheet LM98725 3 Channel, 16-Bit, 81 MSPS Analog Front End with LVDS/CMOS Output, Integrated CCD/CIS Sensor Timing Generator and Spread Spectrum Clock Generation datasheet (Rev. H) PDF | HTML 25 Mär 2015

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LM98725 IBIS Model

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