Startseite Logik- & Spannungsumsetzung Logikgatter AND-Gatter
Startseite
Logik- & Spannungsumsetzung
Logikgatter
AND-Gatter

SN74AUP1G08-Q1

AKTIV

UND-Gatter mit geringem Stromverbrauch (< 1uA), 1 Kanal, 2 Eingänge, 0,8 V bis 3,6 V (Automobilindus

Jetzt bestellen
Datenblatt

SN74AUP1G08-Q1

AKTIV
Datenblatt Jetzt bestellen

Produktdetails

Technology family AUP Supply voltage (min) (V) 0.8 Supply voltage (max) (V) 3.6 Number of channels 1 Inputs per channel 2 IOL (max) (mA) 4 IOH (max) (mA) -4 Input type Standard CMOS Output type Push-Pull Features Over-voltage tolerant inputs, Partial power down (Ioff), Very high speed (tpd 5-10ns) Data rate (max) (Mbps) 100 Rating Automotive Operating temperature range (°C) -40 to 125
Technology family AUP Supply voltage (min) (V) 0.8 Supply voltage (max) (V) 3.6 Number of channels 1 Inputs per channel 2 IOL (max) (mA) 4 IOH (max) (mA) -4 Input type Standard CMOS Output type Push-Pull Features Over-voltage tolerant inputs, Partial power down (Ioff), Very high speed (tpd 5-10ns) Data rate (max) (Mbps) 100 Rating Automotive Operating temperature range (°C) -40 to 125
SOT-SC70 (DCK) 5 4.2 mm² 2 x 2.1
  • AEC-Q100 Qualified with the Following Results:
    • Device Temperature Grade 1: –40°C to 125°C Ambient Operating Temperature Range
    • Device HBM ESD Classification Level H2
    • Device CDM ESD Classification Level C3B
  • Available in the Texas Instruments NanoStar Package
  • Low Static-Power Consumption:
    ICC = 0.9 µA Max
  • Low Dynamic-Power Consumption:
    Cpd = 4.3 pF Typ at 3.3 V
  • Low Input Capacitance: Ci = 1.5 pF Typ
  • Low Noise: Overshoot and Undershoot
    < 10% of VCC
  • Ioff Supports Partial-Power-Down Mode Operation
  • Schmitt-Trigger Action Allows Slow Input Transition and Better
    Switching Noise Immunity at the Input (Vhys = 250 mV, Typ at
    3.3 V)
  • Wide Operating VCC Range of 0.8 V to 3.6 V
  • Optimized for 3.3-V Operation
  • 3.6-V Input/Output (I/O) Tolerant to Support Mixed-Mode Signal Operation
  • tpd = 4.3 ns Max at 3.3 V
  • Suitable for Point-to-Point Applications
  • Latch-Up Performance Exceeds 100 mA Per JESD-78, Class II

NanoStar is a trademark of Texas Instruments.
  • AEC-Q100 Qualified with the Following Results:
    • Device Temperature Grade 1: –40°C to 125°C Ambient Operating Temperature Range
    • Device HBM ESD Classification Level H2
    • Device CDM ESD Classification Level C3B
  • Available in the Texas Instruments NanoStar Package
  • Low Static-Power Consumption:
    ICC = 0.9 µA Max
  • Low Dynamic-Power Consumption:
    Cpd = 4.3 pF Typ at 3.3 V
  • Low Input Capacitance: Ci = 1.5 pF Typ
  • Low Noise: Overshoot and Undershoot
    < 10% of VCC
  • Ioff Supports Partial-Power-Down Mode Operation
  • Schmitt-Trigger Action Allows Slow Input Transition and Better
    Switching Noise Immunity at the Input (Vhys = 250 mV, Typ at
    3.3 V)
  • Wide Operating VCC Range of 0.8 V to 3.6 V
  • Optimized for 3.3-V Operation
  • 3.6-V Input/Output (I/O) Tolerant to Support Mixed-Mode Signal Operation
  • tpd = 4.3 ns Max at 3.3 V
  • Suitable for Point-to-Point Applications
  • Latch-Up Performance Exceeds 100 mA Per JESD-78, Class II

NanoStar is a trademark of Texas Instruments.

The AUP family is TI’s premier solution to the low-power needs of the industry in battery-powered portable applications. This family ensures a very low static- and dynamic-power consumption across the entire VCC range of 0.8 V to 3.6 V, resulting in increased battery life (see Figure 1). This product also maintains excellent signal integrity (see the very low undershoot and overshoot characteristics shown in Figure 2).

This single 2-input positive-AND gate performs the Boolean function: Y = A • B or Y = A\ + B\ in positive logic.

NanoStar package technology is a major breakthrough in integrated circuit (IC) packaging concepts, because it uses the die as the package.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

The AUP family is TI’s premier solution to the low-power needs of the industry in battery-powered portable applications. This family ensures a very low static- and dynamic-power consumption across the entire VCC range of 0.8 V to 3.6 V, resulting in increased battery life (see Figure 1). This product also maintains excellent signal integrity (see the very low undershoot and overshoot characteristics shown in Figure 2).

This single 2-input positive-AND gate performs the Boolean function: Y = A • B or Y = A\ + B\ in positive logic.

NanoStar package technology is a major breakthrough in integrated circuit (IC) packaging concepts, because it uses the die as the package.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
open-in-new Andere AND-Gatter suchen
Herunterladen Video mit Transkript ansehen Video

Ähnliche Produkte, die für Sie interessant sein könnten

open-in-new Alternativen vergleichen
Gleiche Funktionalität, gleiche Pinbelegung wie verglichener Baustein
SN74LVC1G08-Q1 AKTIV UND-Gatter mit 1 Kanälen 2 Eingängen, 1,65 V bis 5,5 V, 32-mA-Treiberstärke (Automobilindustrie) Larger voltage range (1.65V to 5.5V), higher drive average drive strength (24mA)

Technische Dokumentation

star =Von TI ausgewählte Top-Empfehlungen für dieses Produkt
Keine Ergebnisse gefunden. Bitte geben Sie einen anderen Begriff ein und versuchen Sie es erneut.
Alle anzeigen 6
Typ Titel Datum
* Data sheet LOW-POWER SINGLE 2-INPUT POSITIVE AND GATE datasheet 12 Dez 2012
Selection guide Little Logic Guide 2018 (Rev. G) 06 Jul 2018
Selection guide Logic Guide (Rev. AB) 12 Jun 2017
Application note How to Select Little Logic (Rev. A) 26 Jul 2016
More literature Automotive Logic Devices Brochure 27 Aug 2014
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 08 Jul 2004

Design und Entwicklung

Weitere Bedingungen oder erforderliche Ressourcen enthält gegebenenfalls die Detailseite, die Sie durch Klicken auf einen der unten stehenden Titel erreichen.

Evaluierungsplatine

5-8-LOGIC-EVM — Generisches Logik-Evaluierungsmodul für 5- bis 8-polige DCK-, DCT-, DCU-, DRL- und DBV-Gehäuse

Flexibles EVM zur Unterstützung aller Geräte mit 5- bis 8-poligem DCK-, DCT-, DCU-, DRL- oder DBV-Gehäuse.
Benutzerhandbuch: PDF
Nicht verfügbar auf TI.com
Simulationsmodell

SN74AUP1G08 Behavioral SPICE Model

SCEM690.ZIP (7 KB) - PSpice Model
Herunterladen
Simulationsmodell

SN74AUP1G08 IBIS Model (Rev. A)

SCEM405A.ZIP (65 KB) - IBIS Model
Herunterladen
Gehäuse Pins Herunterladen
SOT-SC70 (DCK) 5 Optionen anzeigen
Es gelten die allgemeinen Geschäftsbedingungen von TI für Evaluierungsartikel.

Bestellen & Qualität

Beinhaltete Information:
  • RoHS
  • REACH
  • Bausteinkennzeichnung
  • Blei-Finish/Ball-Material
  • MSL-Rating / Spitzenrückfluss
  • MTBF-/FIT-Schätzungen
  • Materialinhalt
  • Qualifikationszusammenfassung
  • Kontinuierliches Zuverlässigkeitsmonitoring
Beinhaltete Information:
  • Werksstandort
  • Montagestandort

Support und Schulungen

TI E2E™-Foren mit technischem Support von TI-Ingenieuren

Alle Forenthemen auf Englisch anzeigen

Inhalte werden ohne Gewähr von TI und der Community bereitgestellt. Sie stellen keine Spezifikationen von TI dar. Siehe Nutzungsbedingungen.

Bei Fragen zu den Themen Qualität, Gehäuse oder Bestellung von TI-Produkten siehe TI-Support. ​​​​​​​​​​​​​​

Videos