SN74LVCH16540A

Name: SN74LVCH16540A
Brand: TI
SKU: SN74LVCH16540A
Price: 1.253 USD

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16-Kanal-Wechselrichter, 1,65 bis 3,6 V, mit Bus-Hold und Tri-State-Ausgängen

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Datenblatt

document-pdfAcrobat 16-Bit Buffer/Driver With 3-State Outputs datasheet (Rev. H) (Englisch)

SN74LVCH16540A

AKTIV

Datenblatt

Jetzt bestellen

Produktdetails

Technology family

LVC

Supply voltage (min) (V)

1.65

Supply voltage (max) (V)

3.6

Number of channels

16

IOL (max) (mA)

24

IOH (max) (mA)

-24

Supply current (max) (µA)

20

Input type

Standard CMOS

Output type

3-State

Features

Balanced outputs, Bus-hold, Very high speed (tpd 5-10ns)

Rating

Catalog

Operating temperature range (°C)

-40 to 85

Technology family

LVC

Supply voltage (min) (V)

1.65

Supply voltage (max) (V)

3.6

Number of channels

16

IOL (max) (mA)

24

IOH (max) (mA)

-24

Supply current (max) (µA)

20

Input type

Standard CMOS

Output type

3-State

Features

Balanced outputs, Bus-hold, Very high speed (tpd 5-10ns)

Rating

Catalog

Operating temperature range (°C)

-40 to 85

SSOP (DL)

48

164.358 mm² 15.88 x 10.35

TSSOP (DGG)

48

101.25 mm² 12.5 x 8.1

Member of the Texas Instruments Widebus™ Family
Operates From 1.65 V to 3.6 V
Inputs Accept Voltages to 5.5 V
Max t_pd of 3.7 ns at 3.3 V
Typical V_OLP (Output Ground Bounce)
<0.8 V at V_CC = 3.3 V, T_A = 25°C
Typical V_OHV (Output V_OH Undershoot)
>2 V at V_CC = 3.3 V, T_A = 25°C
I_off Supports Partial-Power-Down Mode Operation
Supports Mixed-Mode Signal Operation on All Ports (5-V Input/Output Voltage With 3.3-V V_CC)
Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors
Latch-Up Performance Exceeds 250 mA Per JESD 17
ESD Protection Exceeds JESD 22
- 2000-V Human-Body Model (A114-A)
- 1000-V Charged-Device Model (C101)

Widebus is a trademark of Texas Instruments.

Member of the Texas Instruments Widebus™ Family
Operates From 1.65 V to 3.6 V
Inputs Accept Voltages to 5.5 V
Max t_pd of 3.7 ns at 3.3 V
Typical V_OLP (Output Ground Bounce)
<0.8 V at V_CC = 3.3 V, T_A = 25°C
Typical V_OHV (Output V_OH Undershoot)
>2 V at V_CC = 3.3 V, T_A = 25°C
I_off Supports Partial-Power-Down Mode Operation
Supports Mixed-Mode Signal Operation on All Ports (5-V Input/Output Voltage With 3.3-V V_CC)
Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors
Latch-Up Performance Exceeds 250 mA Per JESD 17
ESD Protection Exceeds JESD 22
- 2000-V Human-Body Model (A114-A)
- 1000-V Charged-Device Model (C101)

Widebus is a trademark of Texas Instruments.

This 16-bit buffer/driver is designed for 1.65-V to 3.6-V V_CC operation, and provides a high-performance bus interface for wide data paths.

The 3-state control gate is a 2-input AND gate with active-low inputs so that if either output-enable (OE1\ or OE2\) input is high, all corresponding outputs are in the high-impedance state.

Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators in a mixed 3.3-V/5-V system environment.

Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended.

To ensure the high-impedance state during power up or power down, OE\ should be tied to V_CC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

This device is fully specified for partial-power-down applications using I_off. The I_off circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

This 16-bit buffer/driver is designed for 1.65-V to 3.6-V V_CC operation, and provides a high-performance bus interface for wide data paths.

The 3-state control gate is a 2-input AND gate with active-low inputs so that if either output-enable (OE1\ or OE2\) input is high, all corresponding outputs are in the high-impedance state.

Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators in a mixed 3.3-V/5-V system environment.

Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended.

To ensure the high-impedance state during power up or power down, OE\ should be tied to V_CC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

This device is fully specified for partial-power-down applications using I_off. The I_off circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

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Alle anzeigen 28

	Typ	Titel	Datum
*	Data sheet	16-Bit Buffer/Driver With 3-State Outputs datasheet (Rev. H)	13 Aug 2002
	Application note	Implications of Slow or Floating CMOS Inputs (Rev. E)	26 Jul 2021
	Application note	An Overview of Bus-Hold Circuit and the Applications (Rev. B)	17 Sep 2018
	Selection guide	Little Logic Guide 2018 (Rev. G)	06 Jul 2018
	Selection guide	Logic Guide (Rev. AB)	12 Jun 2017
	Application note	How to Select Little Logic (Rev. A)	26 Jul 2016
	Application note	Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)	02 Dez 2015
	User guide	LOGIC Pocket Data Book (Rev. B)	16 Jan 2007
	Product overview	Design Summary for WCSP Little Logic (Rev. B)	04 Nov 2004
	Application note	Semiconductor Packing Material Electrostatic Discharge (ESD) Protection	08 Jul 2004
	Application note	Selecting the Right Level Translation Solution (Rev. A)	22 Jun 2004
	User guide	Signal Switch Data Book (Rev. A)	14 Nov 2003
	Application note	Use of the CMOS Unbuffered Inverter in Oscillator Circuits	06 Nov 2003
	User guide	LVC and LV Low-Voltage CMOS Logic Data Book (Rev. B)	18 Dez 2002
	Application note	Texas Instruments Little Logic Application Report	01 Nov 2002
	Application note	TI IBIS File Creation, Validation, and Distribution Processes	29 Aug 2002
	More literature	Standard Linear & Logic for PCs, Servers & Motherboards	13 Jun 2002
	Application note	16-Bit Widebus Logic Families in 56-Ball, 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B)	22 Mai 2002
	Application note	Power-Up 3-State (PU3S) Circuits in TI Standard Logic Devices	10 Mai 2002
	More literature	STANDARD LINEAR AND LOGIC FOR DVD/VCD PLAYERS	27 Mär 2002
	Application note	Migration From 3.3-V To 2.5-V Power Supplies For Logic Devices	01 Dez 1997
	Application note	Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A)	01 Aug 1997
	Application note	CMOS Power Consumption and CPD Calculation (Rev. B)	01 Jun 1997
	Application note	LVC Characterization Information	01 Dez 1996
	Application note	Input and Output Characteristics of Digital Integrated Circuits	01 Okt 1996
	Application note	Live Insertion	01 Okt 1996
	Design guide	Low-Voltage Logic (LVC) Designer's Guide	01 Sep 1996
	Application note	Understanding Advanced Bus-Interface Products Design Guide	01 Mai 1996

Design und Entwicklung

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