Detalles del producto

Configuration 16:1 Number of channels 1 Power supply voltage - single (V) 3.3, 5, 12, 16, 20 Power supply voltage - dual (V) +/-10, +/-2.5, +/-5 Protocols Analog Ron (typ) (Ω) 125 CON (typ) (pF) 5 Supply current (typ) (µA) 0.04 Bandwidth (MHz) 14 Operating temperature range (°C) -55 to 125 Input/output continuous current (max) (mA) 10 Rating Catalog Drain supply voltage (max) (V) 18 Supply voltage (max) (V) 18 Negative rail supply voltage (max) (V) 0
Configuration 16:1 Number of channels 1 Power supply voltage - single (V) 3.3, 5, 12, 16, 20 Power supply voltage - dual (V) +/-10, +/-2.5, +/-5 Protocols Analog Ron (typ) (Ω) 125 CON (typ) (pF) 5 Supply current (typ) (µA) 0.04 Bandwidth (MHz) 14 Operating temperature range (°C) -55 to 125 Input/output continuous current (max) (mA) 10 Rating Catalog Drain supply voltage (max) (V) 18 Supply voltage (max) (V) 18 Negative rail supply voltage (max) (V) 0
SOIC (DW) 24 159.65 mm² 15.5 x 10.3 TSSOP (PW) 24 49.92 mm² 7.8 x 6.4
  • Low ON resistance: 125 (typ.) over 15 Vp-p signal-input range for VDD - VSS = 15 V
  • High OFF resistance: channel leakage of ±10 pA (typ.) @ VDD - VSS = 10 V
  • Matched switch characteristics: RON = 5 (typ.) for VDD - VSS = 15 V
  • Very low quiescent power dissipation under all digital-control input and supply conditions: 0.2 uW (typ.) @ VDD - VSS = 10 V
  • Binary address decoding on chip
  • 5-V, 10-V, and 15-V parametric ratings
  • 100% tested for quiescent current at 20 V
  • Maximum input current of 1 µA at 18 V over full package-temperature range; 100nA at 18 V and 25°C
  • Meets all requirements of JEDEC Tentative Standard No. 13A, "Standard Specifications for Description of 'B' Series CMOS Devices"
  • Applications:
    • Analog and digital multiplexing and demultiplexing
    • A/D and D/A conversion
    • Siganl gating

* When these devices are used as demultiplexers, the channel in/out terminals are the outputs and the common out/in terminals are the inputs.

  • Low ON resistance: 125 (typ.) over 15 Vp-p signal-input range for VDD - VSS = 15 V
  • High OFF resistance: channel leakage of ±10 pA (typ.) @ VDD - VSS = 10 V
  • Matched switch characteristics: RON = 5 (typ.) for VDD - VSS = 15 V
  • Very low quiescent power dissipation under all digital-control input and supply conditions: 0.2 uW (typ.) @ VDD - VSS = 10 V
  • Binary address decoding on chip
  • 5-V, 10-V, and 15-V parametric ratings
  • 100% tested for quiescent current at 20 V
  • Maximum input current of 1 µA at 18 V over full package-temperature range; 100nA at 18 V and 25°C
  • Meets all requirements of JEDEC Tentative Standard No. 13A, "Standard Specifications for Description of 'B' Series CMOS Devices"
  • Applications:
    • Analog and digital multiplexing and demultiplexing
    • A/D and D/A conversion
    • Siganl gating

* When these devices are used as demultiplexers, the channel in/out terminals are the outputs and the common out/in terminals are the inputs.

CD4067B and CD4097B CMOS analog multiplexers/demultiplexers* are digitally controlled analog switches having low ON impedance, low OFF leakage current, and internal address decoding. In addition, the ON resistance is relatively constant over the full input-signal range. The CD4067B is a 16-channel multiplexer with four binary control inputs, A, B, C, D, and an inhibit input, arranged so that any combination of the inputs selects one switch.

The CD4097B is a differential 8-channel multiplexer having three binary control inputs, A, B, C, and an inhibit input. The inputs permit selection of one of eight pairs of switches.

A logic "1" present at the inhibit input turns all channels off.

The CD4067B and CD4097B types are supplied in 24-lead hermetic dual-in-line ceramic packages (F3A suffix), 24-lead dual-in-line plastic packages (E suffix), 24-lead small-outline packages (M, M96, and NSR suffixes), and 24-lead thin shrink small-outline packages (P and PWR suffixes).

CD4067B and CD4097B CMOS analog multiplexers/demultiplexers* are digitally controlled analog switches having low ON impedance, low OFF leakage current, and internal address decoding. In addition, the ON resistance is relatively constant over the full input-signal range. The CD4067B is a 16-channel multiplexer with four binary control inputs, A, B, C, D, and an inhibit input, arranged so that any combination of the inputs selects one switch.

The CD4097B is a differential 8-channel multiplexer having three binary control inputs, A, B, C, and an inhibit input. The inputs permit selection of one of eight pairs of switches.

A logic "1" present at the inhibit input turns all channels off.

The CD4067B and CD4097B types are supplied in 24-lead hermetic dual-in-line ceramic packages (F3A suffix), 24-lead dual-in-line plastic packages (E suffix), 24-lead small-outline packages (M, M96, and NSR suffixes), and 24-lead thin shrink small-outline packages (P and PWR suffixes).

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Documentación técnica

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Tipo Título Fecha
* Data sheet CD4067B, CD4097B TYPES datasheet (Rev. B) 16 jun 2003
Application note Selecting the Correct Texas Instruments Signal Switch (Rev. E) PDF | HTML 02 jun 2022
Application note Multiplexers and Signal Switches Glossary (Rev. B) PDF | HTML 01 dic 2021
Selection guide Logic Guide (Rev. AB) 12 jun 2017
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) 02 dic 2015
User guide LOGIC Pocket Data Book (Rev. B) 16 ene 2007
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 08 jul 2004
User guide Signal Switch Data Book (Rev. A) 14 nov 2003
Application note Understanding Buffered and Unbuffered CD4xxxB Series Device Characteristics 03 dic 2001

Diseño y desarrollo

Para conocer los términos adicionales o los recursos necesarios, haga clic en cualquier título de abajo para ver la página de detalles cuando esté disponible.

Adaptador de interfaz

LEADED-ADAPTER1 — Adaptador de montaje superficial a conector macho DIP para pruebas rápidas de encapsulados con plomo

The EVM-LEADED1 board allows for quick testing and bread boarding of TI's common leaded packages.  The board has footprints to convert TI's D, DBQ, DCT,DCU, DDF, DGS, DGV, and PW surface mount packages to 100mil DIP headers.     

Guía del usuario: PDF
Paquete Pasadores Descargar
SOIC (DW) 24 Ver opciones
TSSOP (PW) 24 Ver opciones

Pedidos y calidad

Información incluida:
  • RoHS
  • REACH
  • Marcado del dispositivo
  • Acabado de plomo/material de la bola
  • Clasificación de nivel de sensibilidad a la humedad (MSL) / reflujo máximo
  • Estimaciones de tiempo medio entre fallas (MTBF)/fallas en el tiempo (FIT)
  • Contenido del material
  • Resumen de calificaciones
  • Monitoreo continuo de confiabilidad
Información incluida:
  • Lugar de fabricación
  • Lugar de ensamblaje

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Soporte y capacitación

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