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Interruptores y multiplexores analógicos

CD74HC4316

ACTIVO

Conmutador analógico de 5 V, 1:1 (SPST) y 4 canales con traducción de nivel

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CD74HC4316

ACTIVO
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Detalles del producto

Configuration 1:1 SPST Number of channels 4 Power supply voltage - single (V) 1.8, 2.5, 3.3, 5 Power supply voltage - dual (V) +/-2.5, +/-5 Protocols Analog Ron (typ) (Ω) 30 CON (typ) (pF) 5 ON-state leakage current (max) (µA) 1 Bandwidth (MHz) 200 Operating temperature range (°C) -55 to 125 Features Break-before-make Input/output continuous current (max) (mA) 25 Rating Catalog Drain supply voltage (max) (V) 6 Supply voltage (max) (V) 10 Negative rail supply voltage (max) (V) 0
Configuration 1:1 SPST Number of channels 4 Power supply voltage - single (V) 1.8, 2.5, 3.3, 5 Power supply voltage - dual (V) +/-2.5, +/-5 Protocols Analog Ron (typ) (Ω) 30 CON (typ) (pF) 5 ON-state leakage current (max) (µA) 1 Bandwidth (MHz) 200 Operating temperature range (°C) -55 to 125 Features Break-before-make Input/output continuous current (max) (mA) 25 Rating Catalog Drain supply voltage (max) (V) 6 Supply voltage (max) (V) 10 Negative rail supply voltage (max) (V) 0
PDIP (N) 16 181.42 mm² 19.3 x 9.4 SOIC (D) 16 59.4 mm² 9.9 x 6 SOP (NS) 16 79.56 mm² 10.2 x 7.8 TSSOP (PW) 16 32 mm² 5 x 6.4
  • Wide Analog-Input-Voltage Range VCC – VEE...0V to 10V
  • Low "ON" Resistance
    • 45 (Typ)...VCC = 4.5V
    • 35 (Typ)...VCC = 6V
    • 30 (Typ)...VCC – VEE = 9V
  • Fast Switching and Propagation Delay Times
  • Low "OFF" Leakage Current
  • Built-In "Break-Before-Make" Switching
  • Logic-Level Translation to Enable 5V Logic to Accommodate ±5V Analog Signals
  • Wide Operating Temperature Range . . . –55°C to 125°C
  • HC Types
    • 2V to 10V Operation
    • High Noise Immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5V
  • HCT Types
    • Direct LSTTL Input Logic Compatibility, VIL = 0.8V (Max), VIH = 2V (Min)
    • CMOS Input Compatibility, Il 1µA at VOL, VOH
  • Wide Analog-Input-Voltage Range VCC – VEE...0V to 10V
  • Low "ON" Resistance
    • 45 (Typ)...VCC = 4.5V
    • 35 (Typ)...VCC = 6V
    • 30 (Typ)...VCC – VEE = 9V
  • Fast Switching and Propagation Delay Times
  • Low "OFF" Leakage Current
  • Built-In "Break-Before-Make" Switching
  • Logic-Level Translation to Enable 5V Logic to Accommodate ±5V Analog Signals
  • Wide Operating Temperature Range . . . –55°C to 125°C
  • HC Types
    • 2V to 10V Operation
    • High Noise Immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5V
  • HCT Types
    • Direct LSTTL Input Logic Compatibility, VIL = 0.8V (Max), VIH = 2V (Min)
    • CMOS Input Compatibility, Il 1µA at VOL, VOH

The ’HC4316 and CD74HCT4316 contain four independent digitally controlled analog switches that use silicon-gate CMOS technology to achieve operating speeds similar to LSTTL with the low power consumption of standard CMOS integrated circuits.

In addition these devices contain logic-level translation circuits that provide for analog signal switching of voltages between ±5V via 5V logic. Each switch is turned on by a high-level voltage on its select input (S) when the common Enable (E) is Low. A High E disables all switches. The digital inputs can swing between VCC and GND; the analog inputs/outputs can swing between VCC as a positive limit and VEE as a negative limit. Voltage ranges are shown in Figures 2 and 3.

The ’HC4316 and CD74HCT4316 contain four independent digitally controlled analog switches that use silicon-gate CMOS technology to achieve operating speeds similar to LSTTL with the low power consumption of standard CMOS integrated circuits.

In addition these devices contain logic-level translation circuits that provide for analog signal switching of voltages between ±5V via 5V logic. Each switch is turned on by a high-level voltage on its select input (S) when the common Enable (E) is Low. A High E disables all switches. The digital inputs can swing between VCC and GND; the analog inputs/outputs can swing between VCC as a positive limit and VEE as a negative limit. Voltage ranges are shown in Figures 2 and 3.
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Documentación técnica

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Tipo Título Fecha
* Data sheet CD54HC4316, CD74HC4316, CD74HCT4316 datasheet (Rev. D) 16 oct 2003
Application note Selecting the Correct Texas Instruments Signal Switch (Rev. E) PDF | HTML 02 jun 2022
Application note Multiplexers and Signal Switches Glossary (Rev. B) PDF | HTML 01 dic 2021
Application note Implications of Slow or Floating CMOS Inputs (Rev. E) 26 jul 2021
Selection guide Logic Guide (Rev. AB) 12 jun 2017
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) 02 dic 2015
User guide LOGIC Pocket Data Book (Rev. B) 16 ene 2007
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 08 jul 2004
User guide Signal Switch Data Book (Rev. A) 14 nov 2003
Application note TI IBIS File Creation, Validation, and Distribution Processes 29 ago 2002
Application note CMOS Power Consumption and CPD Calculation (Rev. B) 01 jun 1997
Application note Designing With Logic (Rev. C) 01 jun 1997
Application note Input and Output Characteristics of Digital Integrated Circuits 01 oct 1996
Application note Live Insertion 01 oct 1996
Application note SN54/74HCT CMOS Logic Family Applications and Restrictions 01 may 1996
Application note Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc 01 abr 1996

Diseño y desarrollo

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Adaptador de interfaz

LEADED-ADAPTER1 — Adaptador de montaje superficial a conector macho DIP para pruebas rápidas de encapsulados con plomo

The EVM-LEADED1 board allows for quick testing and bread boarding of TI's common leaded packages.  The board has footprints to convert TI's D, DBQ, DCT,DCU, DDF, DGS, DGV, and PW surface mount packages to 100mil DIP headers.     

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Paquete Pasadores Descargar
PDIP (N) 16 Ver opciones
SOIC (D) 16 Ver opciones
SOP (NS) 16 Ver opciones
TSSOP (PW) 16 Ver opciones
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Pedidos y calidad

Información incluida:
  • RoHS
  • REACH
  • Marcado del dispositivo
  • Acabado de plomo/material de la bola
  • Clasificación de nivel de sensibilidad a la humedad (MSL) / reflujo máximo
  • Estimaciones de tiempo medio entre fallas (MTBF)/fallas en el tiempo (FIT)
  • Contenido del material
  • Resumen de calificaciones
  • Monitoreo continuo de confiabilidad
Información incluida:
  • Lugar de fabricación
  • Lugar de ensamblaje

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