Detalles del producto

Configuration 1:1 SPST Number of channels 2 Power supply voltage - single (V) 2.5, 3.3 Protocols Analog, I2C, UART Ron (typ) (Ω) 5 CON (typ) (pF) 8 Supply current (typ) (µA) 250 Bandwidth (MHz) 500 Operating temperature range (°C) -55 to 125 Features Powered-off protection, Supports input voltage beyond supply Input/output continuous current (max) (mA) 64 Rating HiRel Enhanced Product Drain supply voltage (max) (V) 3.6 Supply voltage (max) (V) 1.3
Configuration 1:1 SPST Number of channels 2 Power supply voltage - single (V) 2.5, 3.3 Protocols Analog, I2C, UART Ron (typ) (Ω) 5 CON (typ) (pF) 8 Supply current (typ) (µA) 250 Bandwidth (MHz) 500 Operating temperature range (°C) -55 to 125 Features Powered-off protection, Supports input voltage beyond supply Input/output continuous current (max) (mA) 64 Rating HiRel Enhanced Product Drain supply voltage (max) (V) 3.6 Supply voltage (max) (V) 1.3
TSSOP (PW) 8 19.2 mm² 3 x 6.4
  • High-Bandwidth Data Path (up to 500 MHz(1))
  • 5-V-Tolerant I/Os With Device Powered Up or Powered Down
  • Low and Flat ON-State Resistance (ron)
    Characteristics Over Operating Range (ron = 4 Ω Typ)
  • Rail-to-Rail Switching on Data I/O Ports
    • 0- to 5-V Switching With 3.3-V VCC
    • 0- to 3.3-V Switching With 2.5-V VCC
  • Bidirectional Data Flow With Near-Zero Propagation Delay
  • Low Input/Output Capacitance Minimizes
    Loading and Signal Distortion
    (Cio(OFF) = 3.5 pF Typ)
  • Fast Switching Frequency (f OE  = 20 MHz Max)
  • Data and Control Inputs Provide Undershoot Clamp Diodes
  • Low Power Consumption (ICC = 0.25 mA Typ)
  • VCC Operating Range From 2.3 V to 3.6 V
  • Data I/Os Support 0- to 5-V Signaling Levels
    (0.8 V, 1.2 V, 1.5 V, 1.8 V, 2.5 V, 3.3 V, 5 V)
  • Control Inputs Can Be Driven by TTL or
    5-V/3.3-V CMOS Outputs
  • Ioff Supports Partial-Power-Down Mode Operation
  • Latch-Up Performance Exceeds 100 mA
    Per JESD 78, Class II
  • ESD Performance Tested Per JESD 22
    • 2000-V Human-Body Model (A114-B, Class II)
    • 1000-V Charged-Device Model (C101)
  • Supports Both Digital and Analog Applications: USB Interface,
    Differential Signal Interface, Bus Isolation, Low-Distortion
    Signal Gating

SUPPORTS DEFENSE, AEROSPACE, AND MEDICAL APPLICATIONS

  • Controlled Baseline
  • One Assembly and Test Site
  • One Fabrication Site
  • Available in Military (–55°C to 125°C)
    Temperature Range
  • Extended Product Life Cycle
  • Extended Product-Change Notification
  • Product Traceability

(1) For additional information regarding the performance characteristics of the CB3Q family, refer to the TI application report, CBT-C, CB3T, and CB3Q Signal-Switch Families, literature number SCDA008.

  • High-Bandwidth Data Path (up to 500 MHz(1))
  • 5-V-Tolerant I/Os With Device Powered Up or Powered Down
  • Low and Flat ON-State Resistance (ron)
    Characteristics Over Operating Range (ron = 4 Ω Typ)
  • Rail-to-Rail Switching on Data I/O Ports
    • 0- to 5-V Switching With 3.3-V VCC
    • 0- to 3.3-V Switching With 2.5-V VCC
  • Bidirectional Data Flow With Near-Zero Propagation Delay
  • Low Input/Output Capacitance Minimizes
    Loading and Signal Distortion
    (Cio(OFF) = 3.5 pF Typ)
  • Fast Switching Frequency (f OE  = 20 MHz Max)
  • Data and Control Inputs Provide Undershoot Clamp Diodes
  • Low Power Consumption (ICC = 0.25 mA Typ)
  • VCC Operating Range From 2.3 V to 3.6 V
  • Data I/Os Support 0- to 5-V Signaling Levels
    (0.8 V, 1.2 V, 1.5 V, 1.8 V, 2.5 V, 3.3 V, 5 V)
  • Control Inputs Can Be Driven by TTL or
    5-V/3.3-V CMOS Outputs
  • Ioff Supports Partial-Power-Down Mode Operation
  • Latch-Up Performance Exceeds 100 mA
    Per JESD 78, Class II
  • ESD Performance Tested Per JESD 22
    • 2000-V Human-Body Model (A114-B, Class II)
    • 1000-V Charged-Device Model (C101)
  • Supports Both Digital and Analog Applications: USB Interface,
    Differential Signal Interface, Bus Isolation, Low-Distortion
    Signal Gating

SUPPORTS DEFENSE, AEROSPACE, AND MEDICAL APPLICATIONS

  • Controlled Baseline
  • One Assembly and Test Site
  • One Fabrication Site
  • Available in Military (–55°C to 125°C)
    Temperature Range
  • Extended Product Life Cycle
  • Extended Product-Change Notification
  • Product Traceability

(1) For additional information regarding the performance characteristics of the CB3Q family, refer to the TI application report, CBT-C, CB3T, and CB3Q Signal-Switch Families, literature number SCDA008.

The SN74CB3Q3306A is a high-bandwidth FET bus switch utilizing a charge pump to elevate the gate voltage of the pass transistor, providing a low and flat ON-state resistance (ron). The low and flat ON-state resistance allows for minimal propagation delay and supports rail-to-rail switching on the data input/output (I/O) ports. The device also features low data I/O capacitance to minimize capacitive loading and signal distortion on the data bus. Specifically designed to support high-bandwidth applications, the SN74CB3Q3306A provides an optimized interface solution ideally suited for broadband communications, networking, and data-intensive computing systems.

The SN74CB3Q3306A is organized as two 1-bit switches with separate output-enable (1OE, 2OE) inputs. It can be used as two 1-bit bus switches or as one 2-bit bus switch. When OE is low, the associated 1-bit bus switch is ON and the A port is connected to the B port, allowing bidirectional data flow between ports. When OE is high, the associated 1-bit bus switch is OFF, and a high-impedance state exists between the A and B ports.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry prevents damaging current backflow through the device when it is powered down. The device has isolation during power off.

To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

The SN74CB3Q3306A is a high-bandwidth FET bus switch utilizing a charge pump to elevate the gate voltage of the pass transistor, providing a low and flat ON-state resistance (ron). The low and flat ON-state resistance allows for minimal propagation delay and supports rail-to-rail switching on the data input/output (I/O) ports. The device also features low data I/O capacitance to minimize capacitive loading and signal distortion on the data bus. Specifically designed to support high-bandwidth applications, the SN74CB3Q3306A provides an optimized interface solution ideally suited for broadband communications, networking, and data-intensive computing systems.

The SN74CB3Q3306A is organized as two 1-bit switches with separate output-enable (1OE, 2OE) inputs. It can be used as two 1-bit bus switches or as one 2-bit bus switch. When OE is low, the associated 1-bit bus switch is ON and the A port is connected to the B port, allowing bidirectional data flow between ports. When OE is high, the associated 1-bit bus switch is OFF, and a high-impedance state exists between the A and B ports.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry prevents damaging current backflow through the device when it is powered down. The device has isolation during power off.

To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

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Documentación técnica

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Tipo Título Fecha
* Data sheet DUAL FET BUS SWITCH 2.5-V/3.3-V LOW-VOLTAGE HIGH-BANDWIDTH BUS SWITCH datasheet 17 dic 2013
* VID SN74CB3Q3306A-EP VID V6214606 21 jun 2016
* Radiation & reliability report CCB3Q3306AMPWREP Reliability Report 16 dic 2014
Application note Selecting the Correct Texas Instruments Signal Switch (Rev. E) PDF | HTML 02 jun 2022
Application note Multiplexers and Signal Switches Glossary (Rev. B) PDF | HTML 01 dic 2021
Application note CBT-C, CB3T, and CB3Q Signal-Switch Families (Rev. C) PDF | HTML 19 nov 2021
Selection guide Logic Guide (Rev. AB) 12 jun 2017
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) 02 dic 2015
User guide LOGIC Pocket Data Book (Rev. B) 16 ene 2007
More literature Digital Bus Switch Selection Guide (Rev. A) 10 nov 2004
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 08 jul 2004
User guide Signal Switch Data Book (Rev. A) 14 nov 2003
Application note Bus FET Switch Solutions for Live Insertion Applications 07 feb 2003

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DIP-ADAPTER-EVM — Módulo de evaluación de adaptador DIP

Speed up your op amp prototyping and testing with the DIP-Adapter-EVM, which provides a fast, easy and inexpensive way to interface with small, surface-mount ICs. You can connect any supported op amp using the included Samtec terminal strips or wire them directly to existing circuits.

The (...)

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TSSOP (PW) 8 Ver opciones

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