CY29FCT520T-MIL
- Function, Pinout, and Drive Compatible With FCT, F Logic, and AM29520
- Reduced VOH (Typically = 3.3 V) Version of Equivalent FCT Functions
- Edge-Rate Control Circuitry for Significantly Improved Noise Characteristics
- Ioff Supports Partial-Power-Down Mode Operation
- Matched Rise and Fall Times
- Fully Compatible With TTL Input and Output Logic Levels
- ESD Protection Exceeds JESD 22
- 2000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)
- 1000-V Charged-Device Model (C101)
- Single- and Dual-Pipeline Operation Modes
- Multiplexed Data Inputs and Outputs
- CY29FCT520T
- 64-mA Output Sink Current
32-mA Output Source Current
- 64-mA Output Sink Current
- CY29FCT520ATDMB, CY29FCT520BTDMB
- 32-mA Output Sink Current
12-mA Output Source Current
- 32-mA Output Sink Current
- 3-State Outputs
The CY29FCT520T is a multilevel 8-bit-wide pipeline register. The device consists of four registers, A1, A2, B1, and B2, which are configured by the instruction inputs I0, I1 as a single four-level pipeline or as two two-level pipelines. The contents of any register can be read at the multiplexed output at any time by using the multiplex-selection controls (S0 and S1).
The pipeline registers are positive-edge triggered, and data is shifted by the rising edge of the clock input. Instruction I = 0 selects the four-level pipeline mode. Instruction I = 1 selects the two-level B pipeline, while I = 2 selects the two-level A pipeline. I = 3 is the hold instruction; no shifting is performed by the clock in this mode.
In the two-level operation mode, data is shifted from level 1 to level 2 and new data is loaded into level 1.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
기타 장치 및 데이터시트
다른 장치 변형 제품도 CY29FCT520T 제품 페이지에서 찾을 수 있습니다.
이 데이터 시트는 CY29FCT520T 및 CY29FCT520T-MIL 모두에 적용됩니다.
기술 문서
| 유형 | 직함 | 날짜 | ||
|---|---|---|---|---|
| * | Data sheet | Multilevel Pipeline Register With 3-State Outputs datasheet (Rev. C) | 2001/11/02 | |
| Selection guide | Logic Guide (Rev. AB) | 2017/06/12 | ||
| Application note | Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) | 2015/12/02 | ||
| User guide | LOGIC Pocket Data Book (Rev. B) | 2007/01/16 | ||
| Application note | Semiconductor Packing Material Electrostatic Discharge (ESD) Protection | 2004/07/08 | ||
| Application note | Selecting the Right Level Translation Solution (Rev. A) | 2004/06/22 | ||
| User guide | CYFCT Parameter Measurement Information | 2001/04/02 | ||
| Selection guide | Advanced Bus Interface Logic Selection Guide | 2001/01/09 |
설계 및 개발
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주문 및 품질
- RoHS
- REACH
- 디바이스 마킹
- 납 마감/볼 재질
- MSL 등급/피크 리플로우
- MTBF/FIT 예측
- 물질 성분
- 인증 요약
- 지속적인 신뢰성 모니터링
- 팹 위치
- 조립 위치