SN74LVC1G04-Q1

Name: SN74LVC1G04-Q1
Brand: TI
SKU: SN74LVC1G04-Q1
Price: 0.07 USD

활성

오토모티브 단일 1.65V~5.5V 인버터

지금 주문

데이터시트

document-pdfAcrobat Single Inverter Gate, SN74LVC1G04-Q1 datasheet (Rev. D) (영어)

SN74LVC1G04-Q1

활성

데이터시트

지금 주문

제품 상세 정보

Supply voltage (min) (V)

1.65

Supply voltage (max) (V)

5.5

Number of channels

IOL (max) (mA)

IOH (max) (mA)

-32

Input type

Standard CMOS

Output type

Push-Pull

Features

Balanced outputs, Over-voltage tolerant inputs, Partial power down (Ioff), Very high speed (tpd 5-10ns)

Technology family

LVC

Rating

Automotive

Operating temperature range (°C)

-40 to 125

Supply voltage (min) (V)

1.65

Supply voltage (max) (V)

5.5

Number of channels

IOL (max) (mA)

IOH (max) (mA)

-32

Input type

Standard CMOS

Output type

Push-Pull

Features

Balanced outputs, Over-voltage tolerant inputs, Partial power down (Ioff), Very high speed (tpd 5-10ns)

Technology family

LVC

Rating

Automotive

Operating temperature range (°C)

-40 to 125

SOT-23 (DBV)

8.12 mm² 2.9 x 2.8

SOT-SC70 (DCK)

4.2 mm² 2 x 2.1

Qualified for Automotive Applications
AEC-Q100 Qualified with the Following Results
- Device Temperature Grade 1:
  –40°C to 125°C Ambient Operating Temperature Range
- Device HBM ESD Classification Level H2
- Device CDM ESG Classification Level C4B
ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015;
Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)
Supports 5-V V_CC Operation
Inputs Accept Voltages to 5.5 V
Max t_pd of 3.3 ns at 3.3 V
Low Power Consumption, 10-µA Max I_CC
±24-mA Output Drive at 3.3 V
I_off Supports Partial-Power-Down Mode Operation
Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II

Qualified for Automotive Applications
AEC-Q100 Qualified with the Following Results
- Device Temperature Grade 1:
  –40°C to 125°C Ambient Operating Temperature Range
- Device HBM ESD Classification Level H2
- Device CDM ESG Classification Level C4B
ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015;
Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)
Supports 5-V V_CC Operation
Inputs Accept Voltages to 5.5 V
Max t_pd of 3.3 ns at 3.3 V
Low Power Consumption, 10-µA Max I_CC
±24-mA Output Drive at 3.3 V
I_off Supports Partial-Power-Down Mode Operation
Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II

This single inverter gate is designed for 1.65-V to 5.5-V V_CC operation.

The SN74LVC1G04 performs the Boolean function Y = A.

This device is fully specified for partial-power-down applications using I_off. The I_off circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

This single inverter gate is designed for 1.65-V to 5.5-V V_CC operation.

The SN74LVC1G04 performs the Boolean function Y = A.

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모두 보기29

	유형	직함	날짜
*	Data sheet	Single Inverter Gate, SN74LVC1G04-Q1 datasheet (Rev. D)	2013/01/03
	Application note	Implications of Slow or Floating CMOS Inputs (Rev. E)	2021/07/26
	Functional safety information	SN74LVC1G04-Q1 Functional Safety FIT Rate and Failure Mode Distribution	2019/12/30
	Selection guide	Little Logic Guide 2018 (Rev. G)	2018/07/06
	Selection guide	Logic Guide (Rev. AB)	2017/06/12
	Application note	How to Select Little Logic (Rev. A)	2016/07/26
	Application note	Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)	2015/12/02
	More literature	Automotive Logic Devices Brochure	2014/08/27
	User guide	LOGIC Pocket Data Book (Rev. B)	2007/01/16
	Product overview	Design Summary for WCSP Little Logic (Rev. B)	2004/11/04
	Application note	Semiconductor Packing Material Electrostatic Discharge (ESD) Protection	2004/07/08
	Application note	Selecting the Right Level Translation Solution (Rev. A)	2004/06/22
	User guide	Signal Switch Data Book (Rev. A)	2003/11/14
	Application note	Use of the CMOS Unbuffered Inverter in Oscillator Circuits	2003/11/06
	User guide	LVC and LV Low-Voltage CMOS Logic Data Book (Rev. B)	2002/12/18
	Application note	Texas Instruments Little Logic Application Report	2002/11/01
	Application note	TI IBIS File Creation, Validation, and Distribution Processes	2002/08/29
	More literature	Standard Linear & Logic for PCs, Servers & Motherboards	2002/06/13
	Application note	16-Bit Widebus Logic Families in 56-Ball, 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B)	2002/05/22
	Application note	Power-Up 3-State (PU3S) Circuits in TI Standard Logic Devices	2002/05/10
	More literature	STANDARD LINEAR AND LOGIC FOR DVD/VCD PLAYERS	2002/03/27
	Application note	Migration From 3.3-V To 2.5-V Power Supplies For Logic Devices	1997/12/01
	Application note	Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A)	1997/08/01
	Application note	CMOS Power Consumption and CPD Calculation (Rev. B)	1997/06/01
	Application note	LVC Characterization Information	1996/12/01
	Application note	Input and Output Characteristics of Digital Integrated Circuits	1996/10/01
	Application note	Live Insertion	1996/10/01
	Design guide	Low-Voltage Logic (LVC) Designer's Guide	1996/09/01
	Application note	Understanding Advanced Bus-Interface Products Design Guide	1996/05/01

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평가 보드

5-8-LOGIC-EVM — 5핀~8핀 DCK, DCT, DCU, DRL 및 DBV 패키지용 일반 논리 평가 모듈

5~8핀 수의 DCK, DCT, DCU, DRL 또는 DBV 패키지가 있는 모든 디바이스를 지원하도록 설계된 유연한 EVM.

사용 설명서: PDF

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시뮬레이션 모델

HSPICE Model for SN74LVC1G04

SCEJ180.ZIP (86 KB) - HSpice Model

다운로드

시뮬레이션 모델

SN74LVC1G04 Behavioral SPICE Model

SCEM644.ZIP (7 KB) - PSpice Model

다운로드

시뮬레이션 모델

SN74LVC1G04 IBIS Model (Rev. C)

SCEM216C.ZIP (45 KB) - IBIS Model

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