產品詳細資料

Sample rate (max) (Msps) 155 Resolution (Bits) 14 Number of input channels 1 Interface type Parallel CMOS Analog input BW (MHz) 1100 Features High Performance Rating Catalog Peak-to-peak input voltage range (V) 2 Power consumption (typ) (mW) 967 Architecture Pipeline SNR (dB) 72.3 ENOB (bit) 11.6 SFDR (dB) 89.7 Operating temperature range (°C) -40 to 85 Input buffer No
Sample rate (max) (Msps) 155 Resolution (Bits) 14 Number of input channels 1 Interface type Parallel CMOS Analog input BW (MHz) 1100 Features High Performance Rating Catalog Peak-to-peak input voltage range (V) 2 Power consumption (typ) (mW) 967 Architecture Pipeline SNR (dB) 72.3 ENOB (bit) 11.6 SFDR (dB) 89.7 Operating temperature range (°C) -40 to 85 Input buffer No
WQFN (RHS) 48 49 mm² 7 x 7
  • 1.1 GHz Full Power Bandwidth
  • Internal Sample-and-Hold Circuit
  • Low Power Consumption
  • Internal Precision 1.0V Reference
  • Single-Ended or Differential Clock Modes
  • Data Ready Output Clock
  • Clock Duty Cycle Stabilizer
  • Dual +3.3V and +1.8V Supply Operation
    (+/- 10%)
  • Power-Down Mode
  • Offset Binary or 2's Complement Output Data Format
  • 48-pin WQFN Package, (7x7x0.8mm, 0.5mm Pin-Pitch)

Key Specifications

  • Resolution: 14 Bits
  • Conversion Rate: 155 MSPS
  • SNR (fIN = 70 MHz): 71.3 dBFS (typ)
  • SFDR (fIN = 70 MHz): 87.0 dBFS (typ)
  • ENOB (fIN = 70 MHz): 11.5 bits (typ)
  • Full Power Bandwidth: 1.1 GHz (typ)
  • Power Consumption: 967 mW (typ)

All trademarks are the property of their respective owners.

  • 1.1 GHz Full Power Bandwidth
  • Internal Sample-and-Hold Circuit
  • Low Power Consumption
  • Internal Precision 1.0V Reference
  • Single-Ended or Differential Clock Modes
  • Data Ready Output Clock
  • Clock Duty Cycle Stabilizer
  • Dual +3.3V and +1.8V Supply Operation
    (+/- 10%)
  • Power-Down Mode
  • Offset Binary or 2's Complement Output Data Format
  • 48-pin WQFN Package, (7x7x0.8mm, 0.5mm Pin-Pitch)

Key Specifications

  • Resolution: 14 Bits
  • Conversion Rate: 155 MSPS
  • SNR (fIN = 70 MHz): 71.3 dBFS (typ)
  • SFDR (fIN = 70 MHz): 87.0 dBFS (typ)
  • ENOB (fIN = 70 MHz): 11.5 bits (typ)
  • Full Power Bandwidth: 1.1 GHz (typ)
  • Power Consumption: 967 mW (typ)

All trademarks are the property of their respective owners.

The ADC14155 is a high-performance CMOS analog-to-digital converter capable of converting analog input signals into 14-bit digital words at rates up to 155 Mega Samples Per Second (MSPS). This converter uses a differential, pipelined architecture with digital error correction and an on-chip sample-and-hold circuit to minimize power consumption and the external component count, while providing excellent dynamic performance. A unique sample-and-hold stage yields a full-power bandwidth of 1.1 GHz. The ADC14155 operates from dual +3.3V and +1.8V power supplies and consumes 967 mW of power at 155 MSPS.

The separate +1.8V supply for the digital output interface allows lower power operation with reduced noise. A power-down feature reduces the power consumption to 5 mW with the clock input disabled, while still allowing fast wake-up time to full operation.

The differential inputs provide a full scale differential input swing equal to 2 times the reference voltage. A stable 1.0V internal voltage reference is provided, or the ADC14155 can be operated with an external reference.

The ADC14155 can be configured for either single-ended or differential operation. Clock mode (differential versus single-ended) and output data format (offset binary versus 2's complement) are pin-selectable. A duty cycle stabilizer maintains performance over a wide range of clock duty cycles.

The ADC14155 is available in a 48-lead WQFN package and operates over the industrial temperature range of −40°C to +85°C.

The ADC14155 is a high-performance CMOS analog-to-digital converter capable of converting analog input signals into 14-bit digital words at rates up to 155 Mega Samples Per Second (MSPS). This converter uses a differential, pipelined architecture with digital error correction and an on-chip sample-and-hold circuit to minimize power consumption and the external component count, while providing excellent dynamic performance. A unique sample-and-hold stage yields a full-power bandwidth of 1.1 GHz. The ADC14155 operates from dual +3.3V and +1.8V power supplies and consumes 967 mW of power at 155 MSPS.

The separate +1.8V supply for the digital output interface allows lower power operation with reduced noise. A power-down feature reduces the power consumption to 5 mW with the clock input disabled, while still allowing fast wake-up time to full operation.

The differential inputs provide a full scale differential input swing equal to 2 times the reference voltage. A stable 1.0V internal voltage reference is provided, or the ADC14155 can be operated with an external reference.

The ADC14155 can be configured for either single-ended or differential operation. Clock mode (differential versus single-ended) and output data format (offset binary versus 2's complement) are pin-selectable. A duty cycle stabilizer maintains performance over a wide range of clock duty cycles.

The ADC14155 is available in a 48-lead WQFN package and operates over the industrial temperature range of −40°C to +85°C.

下載 觀看有字幕稿的影片 影片

技術文件

star =TI 所選的此產品重要文件
找不到結果。請清除您的搜尋條件,然後再試一次。
檢視所有 4
類型 標題 日期
* Data sheet ADC14155 14-Bit, 155 MSPS, 1.1 GHz Bandwidth A/D Converter datasheet (Rev. I) 2013年 3月 29日
Application note AN-1718 Differential Amplifier Applications Up to 400 MHz (Rev. B) 2013年 5月 1日
User guide 14-Bit, 155 MSPS Analog to Digital Converter User Guide 2012年 1月 25日
Application note Selecting Amplifiers, ADCs, and Clocks for High-Performance Signal Paths 2007年 9月 13日

設計與開發

如需其他條款或必要資源,請按一下下方的任何標題以檢視詳細頁面 (如有)。

模擬工具

PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
封裝 引腳 下載
WQFN (RHS) 48 檢視選項

訂購與品質

內含資訊:
  • RoHS
  • REACH
  • 產品標記
  • 鉛塗層/球物料
  • MSL 等級/回焊峰值
  • MTBF/FIT 估算值
  • 材料內容
  • 資格摘要
  • 進行中可靠性監測
內含資訊:
  • 晶圓廠位置
  • 組裝地點

建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。

支援與培訓

內含 TI 工程師技術支援的 TI E2E™ 論壇

內容係由 TI 和社群貢獻者依「現狀」提供,且不構成 TI 規範。檢視使用條款

若有關於品質、封裝或訂購 TI 產品的問題,請參閱 TI 支援。​​​​​​​​​​​​​​

影片