LF412QML
- Input Offset Voltage Drift: 20 μV/°C (Max)
- Low Input Bias Current: 50 pA (Typ)
- Low Input Noise Current: 0.01 pA/√Hz (Typ)
- Wide Gain Bandwidth: 2.7 MHz (Min)
- High Slew Rate: 8V/μs (Min)
- High Input Impedance: 1012Ω
- Low Total Harmonic Distortion <0.02%
- Low 1/f Noise Corner: 50 Hz
- Fast Settling Time to 0.01%: 2 μs
All trademarks are the property of their respective owners.
This device is a low cost, high speed, JFET input operational amplifier with very low input offset voltage and ensured input offset voltage drift. It requires low supply current yet maintains a large gain bandwidth product and fast slew rate. In addition, well matched high voltage JFET input devices provide very low input bias and offset currents. The LF412 dual is pin compatible with the LM1558, allowing designers to immediately upgrade the overall performance of existing designs.
This amplifier may be used in applications such as high speed integrators, fast D/A converters, sample and hold circuits and many other circuits requiring low input offset voltage and drift, low input bias current, high input impedance, high slew rate and wide bandwidth.
技術文件
類型 | 標題 | 日期 | ||
---|---|---|---|---|
* | Data sheet | LF412QML Low Offset, Low Drift Dual JFET Input Operational Amplifier datasheet (Rev. A) | 2013年 3月 26日 | |
More literature | Die D/S LF412 MDC MWC Low Offset, Low Drift Dual JFET Input Op Amp | 2012年 10月 30日 | ||
More literature | Die D/S LF412 MD8 Low Offset, Low Drift Dual Jfet Input Op Amp | 2012年 9月 7日 |
設計與開發
如需其他條款或必要資源,請按一下下方的任何標題以檢視詳細頁面 (如有)。
ANALOG-ENGINEER-CALC — 類比工程師計算機
CIRCUIT060013 — 具有 T 網路回饋電路的反相放大器
CIRCUIT060074 — 具有比較器電路的高壓側電流感測
PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具
TINA-TI — 基於 SPICE 的類比模擬程式
封裝 | 引腳 | 下載 |
---|---|---|
CDIP (NAB) | 8 | 檢視選項 |
DIESALE (Y) | — | |
TO-CAN (LMC) | 8 | 檢視選項 |
訂購與品質
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 資格摘要
- 進行中可靠性監測
- 晶圓廠位置
- 組裝地點