LMC555
- Fast astable frequency of 3MHz
- Available in industry’s smallest 8-bump DSBGA package (1.43mm × 1.41mm)
- Less than 1mW typical power dissipation at 5V supply
- 1.5V specified supply operating voltage
- output fully compatible with TTL and CMOS logic at 5V supply
- Tested to −10mA, 50mA output current levels
- Reduced supply current spikes during output transitions
- Extremely low reset, trigger, and threshold currents
- Excellent temperature stability
- Pin-for-pin compatible with 555 series of timers
The LMC555 device is a CMOS version of the industry standard 555 series general-purpose timers. In addition to the standard SOIC, VSSSOP, and PDIP packages, the LMC555 is also available in a chip-sized, 8-bump DSBGA package using TI’s DSBGA package technology. The LMC555 offers the same capability of generating accurate time delays and frequencies as the LM555, but with much lower power dissipation and supply current spikes. When operated as a one-shot, the time delay is precisely controlled by a single external resistor and capacitor. In astable mode, the oscillation frequency and duty cycle are accurately set by two external resistors and one capacitor. TI’s LMCMOS process extends both the frequency range and the low supply capability.
技術文件
| 類型 | 標題 | 日期 | ||
|---|---|---|---|---|
| * | Data sheet | LMC555 CMOS Timer datasheet (Rev. N) | PDF | HTML | 2024年 3月 5日 |
| Application note | Considering TI Smart DACs As an Alternative to 555 Timers | PDF | HTML | 2021年 9月 2日 |
設計與開發
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LMG5200POLEVM-10 — LMG5200 GaN 48V 至 1V 負載點評估模組
LMG5200POLEVM-10 EVM 設計旨在評估 48V 至 1V 應用中的 LMG5200 GaN 功率級和 TPS53632G 半橋負載點控制器。此 EVM 採用 48V-1V 轉換器作為單級硬切換半橋式電流倍增器整流器。EVM 支援 36 至 75 伏特輸入電壓，以及最多 50 A 輸出電流；此拓撲可有效率地支援高降壓比率，同時提供顯著的輸出電流與可控制性。
PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具
| 封裝 | 引腳 | 下載 |
|---|---|---|
| DSBGA (YPB) | 8 | 檢視選項 |
| PDIP (P) | 8 | 檢視選項 |
| SOIC (D) | 8 | 檢視選項 |
| VSSOP (DGK) | 8 | 檢視選項 |
訂購與品質
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 資格摘要
- 進行中可靠性監測
- 晶圓廠位置
- 組裝地點
建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。