LMG1210

現行

適用 GaNFET 和 MOSFET 的 1.5A、3A、200V 半橋閘極驅動器、5V UVLO 和可編程失效時間

產品詳細資料

Bootstrap supply voltage (max) (V) 300 Power switch GaNFET, MOSFET Input supply voltage (min) (V) 6 Input supply voltage (max) (V) 18 Peak output current (A) 3 Operating temperature range (°C) -40 to 125 Undervoltage lockout (typ) (V) 4 Rating Catalog Propagation delay time (µs) 0.01 Rise time (ns) 0.5 Fall time (ns) 0.5 Iq (mA) 0.3 Input threshold TTL Channel input logic TTL/PWM Features Dead time control, Internal LDO Driver configuration Half bridge
Bootstrap supply voltage (max) (V) 300 Power switch GaNFET, MOSFET Input supply voltage (min) (V) 6 Input supply voltage (max) (V) 18 Peak output current (A) 3 Operating temperature range (°C) -40 to 125 Undervoltage lockout (typ) (V) 4 Rating Catalog Propagation delay time (µs) 0.01 Rise time (ns) 0.5 Fall time (ns) 0.5 Iq (mA) 0.3 Input threshold TTL Channel input logic TTL/PWM Features Dead time control, Internal LDO Driver configuration Half bridge
WQFN (RVR) 19 12 mm² 4 x 3
  • Up to 50-MHz operation
  • 10-ns typical propagation delay
  • 3.4-ns high-side to low-side matching
  • Minimum pulse width of 4 ns
  • Two control input options
    • Single PWM input with adjustable dead time
    • Independent input mode
  • 1.5-A peak source and 3-A peak sink currents
  • External bootstrap diode for flexibility
  • Internal LDO for adaptability to voltage rails
  • High 300-V/ns CMTI
  • HO to LO capacitance less than 1 pF
  • UVLO and overtemperature protection
  • Low-inductance WQFN package
  • Up to 50-MHz operation
  • 10-ns typical propagation delay
  • 3.4-ns high-side to low-side matching
  • Minimum pulse width of 4 ns
  • Two control input options
    • Single PWM input with adjustable dead time
    • Independent input mode
  • 1.5-A peak source and 3-A peak sink currents
  • External bootstrap diode for flexibility
  • Internal LDO for adaptability to voltage rails
  • High 300-V/ns CMTI
  • HO to LO capacitance less than 1 pF
  • UVLO and overtemperature protection
  • Low-inductance WQFN package

The LMG1210 is a 200-V, half-bridge MOSFET and Gallium Nitride Field Effect Transistor (GaN FET) driver designed for ultra-high frequency, high-efficiency applications that features adjustable deadtime capability, very small propagation delay, and 3.4-ns high-side low-side matching to optimize system efficiency. This part also features an internal LDO which ensures a gate-drive voltage of 5-V regardless of supply voltage.

To enable best performance in a variety of applications, the LMG1210 allows the designer to choose the optimal bootstrap diode to charge the high-side bootstrap capacitor. An internal switch turns the bootstrap diode off when the low side is off, effectively preventing the high-side bootstrap from overcharging and minimizing the reverse recovery charge. Additional parasitic capacitance across the GaN FET is minimized to less than 1 pF to reduce additional switching losses.

The LMG1210 features two control input modes: Independent Input Mode (IIM) and PWM mode. In IIM each of the outputs is independently controlled by a dedicated input. In PWM mode the two complementary output signals are generated from a single input and the user can adjust the dead time from 0 to 20 ns for each edge. The LMG1210 operates over a wide temperature range from –40°C to 125°C and is offered in a low-inductance WQFN package.

The LMG1210 is a 200-V, half-bridge MOSFET and Gallium Nitride Field Effect Transistor (GaN FET) driver designed for ultra-high frequency, high-efficiency applications that features adjustable deadtime capability, very small propagation delay, and 3.4-ns high-side low-side matching to optimize system efficiency. This part also features an internal LDO which ensures a gate-drive voltage of 5-V regardless of supply voltage.

To enable best performance in a variety of applications, the LMG1210 allows the designer to choose the optimal bootstrap diode to charge the high-side bootstrap capacitor. An internal switch turns the bootstrap diode off when the low side is off, effectively preventing the high-side bootstrap from overcharging and minimizing the reverse recovery charge. Additional parasitic capacitance across the GaN FET is minimized to less than 1 pF to reduce additional switching losses.

The LMG1210 features two control input modes: Independent Input Mode (IIM) and PWM mode. In IIM each of the outputs is independently controlled by a dedicated input. In PWM mode the two complementary output signals are generated from a single input and the user can adjust the dead time from 0 to 20 ns for each edge. The LMG1210 operates over a wide temperature range from –40°C to 125°C and is offered in a low-inductance WQFN package.

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類型 標題 日期
* Data sheet LMG1210 200-V, 1.5-A, 3-A half-bridge MOSFET and GaN FET driver with adjustable dead time for applications up to 50 MHz datasheet (Rev. D) PDF | HTML 2019年 2月 7日
Application note Implementing Bootstrap Overcharge Prevention in GaN Half-bridge Circuits PDF | HTML 2023年 11月 15日
Application brief GaN Applications PDF | HTML 2022年 8月 10日
Application brief Key Parameters and Driving Requirements of GaN FETs PDF | HTML 2022年 8月 4日
Application brief Nomenclature, Types, and Structure of GaN Transistors PDF | HTML 2022年 8月 4日
Application brief How GaN Enables More Efficient and Reduced Form Factor Power Supplies PDF | HTML 2022年 8月 2日
Application brief External Gate Resistor Selection Guide (Rev. A) 2020年 2月 28日
Application brief Understanding Peak IOH and IOL Currents (Rev. A) 2020年 2月 28日
Application note How to Optimize RF Amplifier Performance Using LMG1210 2019年 10月 3日
Application brief Achieve Cooler Thermals and Loss of your GaN Half-Bridge with the LMG1210 2019年 5月 23日
Application note GaN Gate Driver Layout Help 2019年 5月 23日
Application note Get the Most Power from a Half-bridge with High-Frequency Controllable Precision 2018年 12月 5日
Application note Optimizing efficiency through dead time control with the LMG1210 GaN driver (Rev. A) 2018年 11月 27日
White paper Optimizing multi-megahertz GaN driver design white paper (Rev. A) 2018年 11月 27日
Technical article The sound of GaN PDF | HTML 2018年 6月 26日
Technical article GaN drivers – switching faster than today’s technology PDF | HTML 2018年 3月 5日
EVM User's guide Using the LMG1210EVM-012 300 V Half-Bridge Driver for GaN 2018年 1月 29日

設計與開發

如需其他條款或必要資源,請按一下下方的任何標題以檢視詳細頁面 (如有)。

開發板

LMG1210EVM-012 — LMG1210 半橋開迴路評估模組

The LMG1210EVM-012 is designed to evaluate the LMG1210 Megahertz 200V half-bridge driver for GaN FETs. This EVM consists on two Gallium Nitride FETs configured in a half-bridge, driven by a single LMG1210. No controller is present on the board.
使用指南: PDF
TI.com 無法提供
模擬型號

LMG1210 PSpice Transient Model (Rev. C)

SNOM615C.ZIP (22427 KB) - PSpice Model
模擬型號

LMG1210 TINA-TI Reference Design (Rev. C)

SNOM617C.TSC (610 KB) - TINA-TI Reference Design
模擬型號

LMG1210 Unencrypted PSPICE Transient Model

SNOM677.ZIP (7 KB) - PSpice Model
CAD/CAE 符號

LMG1210 Altium Deisgn Files

SNOR026.ZIP (3265 KB)
計算工具

SNOR035 LMG1210 Component Design Calculator and Schematic Review

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半橋式驅動器
LMG1210 適用 GaNFET 和 MOSFET 的 1.5A、3A、200V 半橋閘極驅動器、5V UVLO 和可編程失效時間
模擬工具

PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
參考設計

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Test report: PDF
參考設計

PMP21440 — 比較:0.8V/8W GaN 與矽片電源供應參考設計

This reference design provides customers with a comparison study on the usage of GaN vs SI in power supply designs. This specific design uses TPS40400 controller to drive CSD87381 for the silicon power supply and LMG1210 with EPC2111 for the GaN power supply to provide 0.8V/10A. This design (...)
Test report: PDF
電路圖: PDF
參考設計

TIDA-01634 — 適用於高速 DC/DC 轉換器的多 MHz GaN 功率級參考設計

This reference design implements a multi-MHz power stage design based on the LMG1210 half-bridge GaN driver and GaN power High Electron Mobility Transistors (HEMTs). With highly efficient switches and flexible dead-time adjustment, this design can significantly improve power density while (...)
Design guide: PDF
電路圖: PDF
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WQFN (RVR) 19 檢視選項

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