LP3878-ADJ
- Input Supply Voltage: 2.5 V to 16V
- Output Voltage Range: 1 V to 5.5 V
- Designed for Use With Low-ESR Ceramic
Capacitors - Very Low Output Noise
- 8-Lead SO PowerPAD and WSON Surface-
Mount Packages - < 10-µA Quiescent Current in Shutdown
- Low Ground Pin Current at all Loads
- Overtemperature and Overcurrent Protection
- –40°C to 125°C Operating Junction Temperature
Range
The LP3878-ADJ is an 800-mA, adjustable output, voltage regulator designed to provide high performance and low noise in applications requiring output voltages as low as 1 V.
Using an optimized VIP (Vertically Integrated PNP) process, the LP3878-ADJ delivers superior performance:
- Ground Pin Current: Typically 5.5 mA at 800-mA load, and 180 µA at 100-µA load.
- Low Power Shutdown: The LP3878-ADJ draws less than 10-µA quiescent current when the SHUTDOWN pin is pulled low.
- Precision Output: Ensured output voltage accuracy is 1% at room temperature.
- Low Noise: Broadband output noise is only 18 µV (typical) with a 10-nF bypass capacitor.
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參考設計
TIDA-00360 — 具 16 位元 ADC 和 100 MHz IF 頻寬的 700–2700 MHz 雙通道接收器參考設計
The increasing demand on wireless networks to provide faster data links to customers has driven transceiver hardware to increasingly demanding performance with enough bandwidth to support the largest standardized multi-carrier frequency bands (with band aggregation in some cases) and enough (...)
參考設計
TIDA-00531 — 將線性穩壓器作為動態電壓調節電源供應器的參考設計
The TIDA-00531 reference design features dynamic voltage scaling (DVS) as a power management solution to power CPU/DSP core voltages.
參考設計
TIDA-00431 — 採用 8 GHz DC 耦合差動放大器的射頻取樣 4 GSPS ADC 參考設計
Wideband radio frequency (RF) receivers allow greatly increased flexibility in radio designs. The wide instantaneous bandwidth allows flexible tuning without changing hardware and the ability to capture multiple channels at widely separated frequencies.
This reference design describes a wideband RF (...)
參考設計
TIDA-00988 — 160 MHz 頻寬無線訊號測試器參考設計
This reference design implements an IF subsystem for a standard wireless signal tester with an active balun-amplifier (LMH5401), LC bandpass filter, 16-bit ADC (ADC31JB68) and clock cleaner and generator PLL (LMK04828). Measurements using modulated signals demonstrate reception of the signal with (...)
參考設計
TIDA-00597 — 適用於時鐘產生器的低雜訊電源解決方案參考設計
The TIDA-00597 can provide very low noise output power for clock generator.
參考設計
TIDA-00432 — 使用適用於相位陣列雷達系統的 Xilinx 平台，將 JESD204B Giga-Sample ADC 同步化
This system level design shows how two ADC12J4000 evaluation modules (EVMs) can be synchronized together using a Xilinx VC707 platform. The design document describes the required hardware modifications and device configurations, including the clocking scheme. Example configuration files are shown (...)
參考設計
TIDA-00353 — JESD204B 串列鏈路的均衡最佳化參考設計
Employing equalization techniques is an effective way of compensating for channel loss in JESD204B high speed serial interfaces for data converters. This reference design features the ADC16DX370, a dual 16-bit, 370 MSPS analog-to-digital converter (ADC) that utilizes de-emphasis equalization to (...)
參考設計
TIDA-00153 — 使用高速 ADC 的 JESD204B 連結延遲設計
JESD204B links are the latest trend in data-converter digital interfaces. These links take advantage of high-speed serial-digital technology to offer many compelling benefits including improved channel densities. This reference design addresses one of the challenges of adopting the new interface: (...)
| 封裝 | 引腳 | 下載 |
|---|---|---|
| HSOIC (DDA) | 8 | 檢視選項 |
| WSON (NGT) | 8 | 檢視選項 |
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