PCM5100 不建議用於新設計
儘管為了支援以前的設計而繼續生產此項產品,但我們並不建議用在新設計上。考量下列其中一項替代產品:
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PCM5100A 現行 具 32 位元、384kHz PCM 介面的 2VRMS DirectPath™、100dB 音訊立體聲道 DAC Replacement for the NRND device

產品詳細資料

Number of DAC channels 2 Analog inputs 0 Analog outputs 2 DAC SNR (typ) (dB) 100 Sampling rate (max) (kHz) 384 Control interface HW Resolution (Bits) 32 Architecture Delta Sigma with line driver Operating temperature range (°C) -25 to 85 Rating Catalog
Number of DAC channels 2 Analog inputs 0 Analog outputs 2 DAC SNR (typ) (dB) 100 Sampling rate (max) (kHz) 384 Control interface HW Resolution (Bits) 32 Architecture Delta Sigma with line driver Operating temperature range (°C) -25 to 85 Rating Catalog
TSSOP (PW) 20 41.6 mm² 6.5 x 6.4
  • Market-Leading Low Out-of-Band Noise
  • Selectable Digital-Filter Latency and Performance
  • No DC Blocking Capacitors Required
  • Integrated Negative Charge Pump
  • Internal Pop-Free Control For Sample-Rate Changes Or Clock Halts
  • Intelligent Muting System; Soft Up or Down Ramp and Analog Mute
    For 120dB Mute SNR With Popless Operation.
  • Integrated High-Performance Audio PLL With BCK Reference
    To Generate SCK Internally
  • Small 20-pin TSSOP Package
  • Market-Leading Low Out-of-Band Noise
  • Selectable Digital-Filter Latency and Performance
  • No DC Blocking Capacitors Required
  • Integrated Negative Charge Pump
  • Internal Pop-Free Control For Sample-Rate Changes Or Clock Halts
  • Intelligent Muting System; Soft Up or Down Ramp and Analog Mute
    For 120dB Mute SNR With Popless Operation.
  • Integrated High-Performance Audio PLL With BCK Reference
    To Generate SCK Internally
  • Small 20-pin TSSOP Package

The PCM510x devices are a family of monolithic CMOS integrated circuits that include a stereo digital-to-analog converter and additional support circuitry in a small TSSOP package. The PCM510x uses the latest generation of TI’s advanced segment-DAC architecture to achieve excellent dynamic performance and improved tolerance to clock jitter.

The PCM510x provides 2.1VRMS ground centered outputs, allowing designers to eliminate DC blocking capacitors on the output, as well as external muting circuits traditionally associated with single supply line drivers.

The integrated line driver surpasses all other charge-pump based line drivers by supporting loads down to 1kΩ. By supporting loads down to 1kΩ, the PCM510x can essentially drive up to 10 products in parallel, such as an LCD TV, DVDR, AV Receivers and other devices.

The integrated PLL on the device removes the requirement for a system clock (commonly known as master clock), allowing a 3-wire I2S connection and reducing system EMI.

Intelligent clock error and PowerSense under voltage protection utilizes a two level mute system for pop-free performance. Upon clock error or system power failure, the device digitally attenuates the data (or last known good data), then mutes the analog circuit

Compared with existing DAC technology, the PCM510x family offers up to 20dB lower out-of-band noise, reducing EMI and aliasing in downstream amplifiers/ADCs. (from traditional 100kHz OBN measurements all the way to 3MHz)

The PCM510x accepts industry-standard audio data formats with 16- to 32-bit data. Sample rates up to 384kHz are supported.

The PCM510x devices are a family of monolithic CMOS integrated circuits that include a stereo digital-to-analog converter and additional support circuitry in a small TSSOP package. The PCM510x uses the latest generation of TI’s advanced segment-DAC architecture to achieve excellent dynamic performance and improved tolerance to clock jitter.

The PCM510x provides 2.1VRMS ground centered outputs, allowing designers to eliminate DC blocking capacitors on the output, as well as external muting circuits traditionally associated with single supply line drivers.

The integrated line driver surpasses all other charge-pump based line drivers by supporting loads down to 1kΩ. By supporting loads down to 1kΩ, the PCM510x can essentially drive up to 10 products in parallel, such as an LCD TV, DVDR, AV Receivers and other devices.

The integrated PLL on the device removes the requirement for a system clock (commonly known as master clock), allowing a 3-wire I2S connection and reducing system EMI.

Intelligent clock error and PowerSense under voltage protection utilizes a two level mute system for pop-free performance. Upon clock error or system power failure, the device digitally attenuates the data (or last known good data), then mutes the analog circuit

Compared with existing DAC technology, the PCM510x family offers up to 20dB lower out-of-band noise, reducing EMI and aliasing in downstream amplifiers/ADCs. (from traditional 100kHz OBN measurements all the way to 3MHz)

The PCM510x accepts industry-standard audio data formats with 16- to 32-bit data. Sample rates up to 384kHz are supported.

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技術文件

star =TI 所選的此產品重要文件
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檢視所有 2
類型 標題 日期
* Data sheet PCM5100,1,2 Audio Stereo DAC. datasheet (Rev. B) 2012年 4月 25日
EVM User's guide PCM510xEVM-U User Guide (Rev. C) 2014年 10月 13日

設計與開發

如需其他條款或必要資源,請按一下下方的任何標題以檢視詳細頁面 (如有)。

支援軟體

SLAC493 CodecControl_PCM510x_GUI

支援產品和硬體

支援產品和硬體

產品
音訊 DAC
PCM5100 100dB 立體聲道 DAC,具 2VRMS 輸出和整合音訊 PLL PCM5101 具 2VRMS 輸出和整合式音訊 PLL 的 106dB 立體聲道 DAC PCM5102 112dB 立體聲 DAC,具 2VRMS 輸出和整合式音訊 PLL
硬體開發
開發板
PCM5102EVM-U PCM5102 評估模組
模擬型號

PCM5100 IBIS Model

SLAM084.ZIP (13 KB) - IBIS Model
模擬工具

PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
封裝 引腳 下載
TSSOP (PW) 20 檢視選項

訂購與品質

內含資訊:
  • RoHS
  • REACH
  • 產品標記
  • 鉛塗層/球物料
  • MSL 等級/回焊峰值
  • MTBF/FIT 估算值
  • 材料內容
  • 資格摘要
  • 進行中可靠性監測
內含資訊:
  • 晶圓廠位置
  • 組裝地點

支援與培訓

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