SM72482
- Renewable Energy Grade
- Independently Drives Two N-Channel MOSFETs
- Compound CMOS and Bipolar Outputs Reduce Output Current Variation
- 5A Sink, 3A Source Current Capability
- Two Channels Can be Connected in Parallel to Double the Drive Current
- Independent Inputs (TTL Compatible)
- Fast Propagation Times (25 ns Typical)
- Fast Rise and Fall Times (14 ns Rise, 12 ns Fall With 2 nF Load)
- Available in Dual Noninverting, Dual Inverting, and Combination Configurations
- Supply Rail Under-Voltage Lockout Protection (UVLO)
- SM72482 UVLO Configured to Drive PFET Through OUT_A and NFET Through OUT_B
- Pin Compatible With Industry Standard Gate Drivers
- Packages
- SOIC
- Thermally Enhanced VSSOP
All trademarks are the property of their respective owners.
The SM72482 Dual Gate Driver replaces industry standard gate drivers with improved peak output current and efficiency. Each “compound” output driver stage includes MOS and bipolar transistors operating in parallel that together sink more than 5A peak from capacitive loads. Combining the unique characteristics of MOS and bipolar devices reduces drive current variation with voltage and temperature. Under-voltage lockout protection is also provided. The drivers can be operated in parallel with inputs and outputs connected to double the drive current capability. This device is available in the SOIC package.
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檢視所有 2 | 類型 | 標題 | 日期 | ||
|---|---|---|---|---|
| * | Data sheet | SM72482 Dual 5A Compound Gate Driver datasheet (Rev. C) | 2013年 4月 1日 | |
| More literature | Fundamentals of MOSFET and IGBT Gate Driver Circuits (Replaces SLUP169) (Rev. A) | 2018年 10月 29日 |
設計與開發
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模擬工具
PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具
PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
參考設計
PMP9461 — 適用於太陽能微型逆變器 DC/DC 和 DC/AC 模組的完整閘極驅動和偏壓電源解決方案
PMP9461 is a reference design with complete power and gate drive requirements for grid tie solar microinverters. The major goal of the reference design is to acheive significant integration and perfomance enhancement in gate drive as well as the bias supply segment (...)
| 封裝 | 引腳 | 下載 |
|---|---|---|
| SOIC (D) | 8 | 檢視選項 |
訂購與品質
內含資訊：
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 資格摘要
- 進行中可靠性監測
內含資訊：
- 晶圓廠位置
- 組裝地點