UCC27624

現行

具有 4-V UVLO、30-V VDD 與低傳播延遲的 5-A/5-A 雙通道閘極驅動器

產品詳細資料

Number of channels 2 Power switch GaNFET, IGBT, MOSFET Peak output current (A) 5 Input supply voltage (min) (V) 4.5 Input supply voltage (max) (V) 26 Features Enable pin Operating temperature range (°C) -40 to 150 Rise time (ns) 6 Fall time (ns) 10 Propagation delay time (µs) 0.017 Input threshold CMOS, TTL Channel input logic Dual, Non-Inverting Input negative voltage (V) -10 Rating Catalog Undervoltage lockout (typ) (V) 4 Driver configuration Dual, Non-Inverting
Number of channels 2 Power switch GaNFET, IGBT, MOSFET Peak output current (A) 5 Input supply voltage (min) (V) 4.5 Input supply voltage (max) (V) 26 Features Enable pin Operating temperature range (°C) -40 to 150 Rise time (ns) 6 Fall time (ns) 10 Propagation delay time (µs) 0.017 Input threshold CMOS, TTL Channel input logic Dual, Non-Inverting Input negative voltage (V) -10 Rating Catalog Undervoltage lockout (typ) (V) 4 Driver configuration Dual, Non-Inverting
HVSSOP (DGN) 8 14.7 mm² 3 x 4.9 SOIC (D) 8 29.4 mm² 4.9 x 6
  • Typical 5-A peak source and sink drive current for each channel
  • Input and enable pins capable of handling –10 V
  • Output capable of handling –2-V transients
  • Absolute maximum VDD voltage: 30 V
  • Wide VDD operating range from 4.5 V to 26 V with UVLO
  • Two independent gate drive channels
  • Independent enable function for each output
  • Hysteretic-logic thresholds for high noise immunity
  • VDD independent input thresholds (TTL compatible)
  • Fast propagation delays (17-ns typical)
  • Fast rise and fall times (6-ns and 10-ns typical)
  • 1-ns typical delay matching between the two channels
  • Two channels can be paralleled for higher drive current
  • SOIC8 and VSSOP8 PowerPAD™ package options
  • Operating junction temperature range of –40°C to 150°C
  • Typical 5-A peak source and sink drive current for each channel
  • Input and enable pins capable of handling –10 V
  • Output capable of handling –2-V transients
  • Absolute maximum VDD voltage: 30 V
  • Wide VDD operating range from 4.5 V to 26 V with UVLO
  • Two independent gate drive channels
  • Independent enable function for each output
  • Hysteretic-logic thresholds for high noise immunity
  • VDD independent input thresholds (TTL compatible)
  • Fast propagation delays (17-ns typical)
  • Fast rise and fall times (6-ns and 10-ns typical)
  • 1-ns typical delay matching between the two channels
  • Two channels can be paralleled for higher drive current
  • SOIC8 and VSSOP8 PowerPAD™ package options
  • Operating junction temperature range of –40°C to 150°C

The UCC27624 is a dual-channel, high-speed, low-side gate driver that effectively drives MOSFET, IGBT, SiC, and GaN power switches. UCC27624 has a typical peak drive strength of 5 A, which reduces rise and fall times of the power switches, lowers switching losses, and increases efficiency. The device’s fast propagation delay (17-ns typical) yields better power stage efficiency by improving the deadtime optimization, pulse width utilization, control loop response, and transient performance of the system.

UCC27624 can handle –10 V at its inputs, which improves robustness in systems with moderate ground bouncing. The inputs are independent of supply voltage and can be connected to most controller outputs for maximum control flexibility. An independent enable signal allows the power stage to be controlled independently of main control logic. In the event of a system fault, the gate driver can quickly shut-off by pulling enable low. Many high-frequency switching power supplies exhibit noise at the gate of the power device, which can get injected into the output pin on the gate driver and can cause the driver to malfunction. The device’s transient reverse current and reverse voltage capability allow it to tolerate noise on the gate of the power device or pulse-transformer and avoid driver malfunction.

The UCC27624 also features undervoltage lockout (UVLO) for improved system robustness. When there is not enough bias voltage to fully enhance the power device, the gate driver output is held low by the strong internal pull down MOSFET.

The UCC27624 is a dual-channel, high-speed, low-side gate driver that effectively drives MOSFET, IGBT, SiC, and GaN power switches. UCC27624 has a typical peak drive strength of 5 A, which reduces rise and fall times of the power switches, lowers switching losses, and increases efficiency. The device’s fast propagation delay (17-ns typical) yields better power stage efficiency by improving the deadtime optimization, pulse width utilization, control loop response, and transient performance of the system.

UCC27624 can handle –10 V at its inputs, which improves robustness in systems with moderate ground bouncing. The inputs are independent of supply voltage and can be connected to most controller outputs for maximum control flexibility. An independent enable signal allows the power stage to be controlled independently of main control logic. In the event of a system fault, the gate driver can quickly shut-off by pulling enable low. Many high-frequency switching power supplies exhibit noise at the gate of the power device, which can get injected into the output pin on the gate driver and can cause the driver to malfunction. The device’s transient reverse current and reverse voltage capability allow it to tolerate noise on the gate of the power device or pulse-transformer and avoid driver malfunction.

The UCC27624 also features undervoltage lockout (UVLO) for improved system robustness. When there is not enough bias voltage to fully enhance the power device, the gate driver output is held low by the strong internal pull down MOSFET.

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UCC27624-Q1 現行 具有 4-V UVLO、30-V VDD 與低傳播延遲的車用 5-A/5-A 雙通道閘極驅動器 Automotive qualified version

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類型 標題 日期
* Data sheet UCC27624 30-V, 5-A, Dual-Channel, Low-Side Gate Driver with –10-V Input Capability datasheet (Rev. C) PDF | HTML 2023年 2月 13日
Application note Selecting Gate Drivers for HVAC Systems PDF | HTML 2024年 4月 4日
Application note Why use a Gate Drive Transformer? PDF | HTML 2024年 3月 4日
Application note Review of Different Power Factor Correction (PFC) Topologies' Gate Driver Needs PDF | HTML 2024年 1月 22日
Technical article Managing power-supply noise with a 30-V gate driver PDF | HTML 2021年 12月 7日
Application note Benefits of a Compact, Powerful, and Robust Low-Side Gate Driver PDF | HTML 2021年 11月 10日

設計與開發

如需其他條款或必要資源,請按一下下方的任何標題以檢視詳細頁面 (如有)。

開發板

UCC27624DGNEVM — 適用雙通道 30-V、5-A 高速低壓側閘極驅動器的 UCC27624 評估模組

UCC27624 評估模組 (EVM) 專為評估 30-V、5-A 單通道閘極驅動器而設計。此 EVM 的目標是依產品規格書參數評估驅動器 IC。驅動器 IC 可針對各種電容與電阻負載進行評估。EVM 可設定為平行處理驅動器 IC 通道,以獲得更高的閘極驅動器輸出電流。EVM 具備評估 TO-220 體積功率電晶體的佈建。

使用指南: PDF
TI.com 無法提供
開發板

UCC27624EVM — UCC27624 評估模組雙通道 30-V、5-A 高速低壓側閘極驅動器

UCC27624 評估模組 (EVM) 專為評估 TI 的 30-V、5-A 單通道閘極驅動器而設計。此 EVM 的目標是依產品規格書參數評估驅動器 IC。驅動器 IC 可針對各種電容與電阻負載進行評估。EVM 可設定為平行處理驅動器 IC 通道,以獲得更高的閘極驅動器輸出電流。EVM 具備評估 TO-220 體積功率電晶體的佈建。

使用指南: PDF | HTML
TI.com 無法提供
模擬型號

UCC27624 PSpice Transient Model

SLUM884.ZIP (32 KB) - PSpice Model
模擬型號

UCC27624 SIMPLIS Model

SLUM795.ZIP (34 KB) - SIMPLIS Model
計算工具

SLURB18 UCC27624 Schematic Review Template

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產品
低壓側驅動器
UCC27624 具有 4-V UVLO、30-V VDD 與低傳播延遲的 5-A/5-A 雙通道閘極驅動器
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PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
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HVSSOP (DGN) 8 檢視選項
SOIC (D) 8 檢視選項

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