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最新 TXV0106-Q1 現行 Automotive dual-supply fixed-direction six-channel voltage translator 6 channel device with improved timing specs such as rise/fall time, skew, and propagation delay.

產品詳細資料

Technology family AXC Applications RGMII Bits (#) 8 High input voltage (min) (V) 0.455 High input voltage (max) (V) 3.6 Vout (min) (V) 0.65 Vout (max) (V) 3.6 Data rate (max) (Mbps) 380 IOH (max) (mA) -12 IOL (max) (mA) 12 Supply current (max) (µA) 55 Features Output enable, Overvoltage tolerant inputs, Partial power down (Ioff), Vcc isolation Input type Standard CMOS Output type 3-State, Balanced CMOS, Push-Pull Rating Catalog Operating temperature range (°C) -40 to 125
Technology family AXC Applications RGMII Bits (#) 8 High input voltage (min) (V) 0.455 High input voltage (max) (V) 3.6 Vout (min) (V) 0.65 Vout (max) (V) 3.6 Data rate (max) (Mbps) 380 IOH (max) (mA) -12 IOL (max) (mA) 12 Supply current (max) (µA) 55 Features Output enable, Overvoltage tolerant inputs, Partial power down (Ioff), Vcc isolation Input type Standard CMOS Output type 3-State, Balanced CMOS, Push-Pull Rating Catalog Operating temperature range (°C) -40 to 125
TSSOP (PW) 24 49.92 mm² 7.8 x 6.4 UQFN (RJW) 24 8 mm² 4 x 2 VQFN (RHL) 24 19.25 mm² 5.5 x 3.5
  • Qualified fully configurable dual-rail design allows each port to operate with a power supply range from 0.65V to 3.6V
  • Operating temperature from –40°C to +125°C
  • Multiple direction-control pins to allow simultaneous up and down translation
  • Up to 380Mbps support when translating from 1.8V to 3.3V
  • VCC isolation feature to effectively Isolate both buses in a power-down scenario
  • Partial power-down mode to limit backflow current in a power-down scenario
  • Compatible with SN74AVC8T245 and 74AVC8T245 level shifters
  • Latch-up performance exceeds 100mA per JESD 78, class II
  • ESD protection exceeds JESD 22
    • 8000-V human-body model
    • 1000-V charged-device model
  • Qualified fully configurable dual-rail design allows each port to operate with a power supply range from 0.65V to 3.6V
  • Operating temperature from –40°C to +125°C
  • Multiple direction-control pins to allow simultaneous up and down translation
  • Up to 380Mbps support when translating from 1.8V to 3.3V
  • VCC isolation feature to effectively Isolate both buses in a power-down scenario
  • Partial power-down mode to limit backflow current in a power-down scenario
  • Compatible with SN74AVC8T245 and 74AVC8T245 level shifters
  • Latch-up performance exceeds 100mA per JESD 78, class II
  • ESD protection exceeds JESD 22
    • 8000-V human-body model
    • 1000-V charged-device model

The SN74AXC8T245 device is an 8-bit non-inverting bus transceiver that resolves voltage level mismatch between devices operating at the latest voltage nodes (0.7V, 0.8V, and 0.9V) and devices operating at industry standard voltage nodes (1.8V, 2.5V, and 3.3V) and vice versa.

The device operates by using two independent power-supply rails (VCCA and VCCB) that operate as low as 0.65V. Data pins A1 through A8 are designed to track VCCA, which accepts any supply voltage from 0.65V to 3.6V. Data pins B1 through B8 are designed to track VCCB, which accepts any supply voltage from 0.65V to 3.6V.

The SN74AXC8T245 device is designed for asynchronous communication between data buses. The device transmits data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level of the direction-control inputs (DIR1 and DIR2). The output-enable (OE) input is used to disable the outputs so the buses are effectively isolated.

The SN74AXC8T245 device is designed so the control pins (DIR and OE) are referenced to VCCA.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs when the device is powered down. This inhibits current backflow into the device which prevents damage to the device.

The VCC isolation feature is designed so that if either VCC input supply is below 100mV, all level shifter outputs are disabled and placed into a high-impedance state.

To put the level shifter I/Os in the high-impedance state during power up or power down, tie OE to VCCA through a pullup resistor; the current-sinking capability of the driver determines the minimum value of the resistor.

The SN74AXC8T245 device is an 8-bit non-inverting bus transceiver that resolves voltage level mismatch between devices operating at the latest voltage nodes (0.7V, 0.8V, and 0.9V) and devices operating at industry standard voltage nodes (1.8V, 2.5V, and 3.3V) and vice versa.

The device operates by using two independent power-supply rails (VCCA and VCCB) that operate as low as 0.65V. Data pins A1 through A8 are designed to track VCCA, which accepts any supply voltage from 0.65V to 3.6V. Data pins B1 through B8 are designed to track VCCB, which accepts any supply voltage from 0.65V to 3.6V.

The SN74AXC8T245 device is designed for asynchronous communication between data buses. The device transmits data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level of the direction-control inputs (DIR1 and DIR2). The output-enable (OE) input is used to disable the outputs so the buses are effectively isolated.

The SN74AXC8T245 device is designed so the control pins (DIR and OE) are referenced to VCCA.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs when the device is powered down. This inhibits current backflow into the device which prevents damage to the device.

The VCC isolation feature is designed so that if either VCC input supply is below 100mV, all level shifter outputs are disabled and placed into a high-impedance state.

To put the level shifter I/Os in the high-impedance state during power up or power down, tie OE to VCCA through a pullup resistor; the current-sinking capability of the driver determines the minimum value of the resistor.

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類型 標題 日期
* Data sheet SN74AXC8T245 8-Bit Dual-Supply Bus Transceiver With Configurable Voltage Translation and Tri-State Outputs datasheet (Rev. C) PDF | HTML 2024年 1月 30日
EVM User's guide TXV010xEVM Evaluation Module User's Guide PDF | HTML 2024年 2月 5日
Application note Overcoming Design Challenges - Implementing High Performance Interfaces PDF | HTML 2023年 12月 12日
Application brief Future-Proofing Your Level Shifter Design with TI's Dual Footprint Packages PDF | HTML 2023年 9月 5日
Application brief Voltage Level Translation Use Cases for Smart Meters PDF | HTML 2023年 1月 31日
Application brief Translate Voltages for RGMII (Rev. A) PDF | HTML 2021年 8月 6日
EVM User's guide AXC Small-Package Evaluation Module User's Guide (Rev. A) PDF | HTML 2021年 7月 12日
Selection guide Voltage Translation Buying Guide (Rev. A) 2021年 4月 15日
Application note Low Voltage Translation for SPI, UART, RGMII, JTAG Interfaces (Rev. B) PDF | HTML 2021年 3月 29日
Application note Traction Inverter Motor Control Enhancement Using Logic and Translation 2020年 6月 25日
Application brief How to Support 1.8-V Signals Using a 3.3-V LVDS Driver/Receiver + Level-Shifter 2018年 12月 28日
Application note Glitch free power sequencing with AXC level translators (Rev. A) 2018年 9月 20日
User guide SN74AXC8T245 Evaluation Module 2017年 8月 2日

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模擬型號

SN74AXC8T245 IBIS Model (Rev. C)

SCEM580C.ZIP (52 KB) - IBIS Model
封裝 引腳 下載
TSSOP (PW) 24 檢視選項
UQFN (RJW) 24 檢視選項
VQFN (RHL) 24 檢視選項

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