產品詳細資料

Technology family LV-A Applications GPIO Bits (#) 4 Configuration 4 Ch A to B 0 Ch B to A High input voltage (min) (V) 1 High input voltage (max) (V) 5.5 Vout (min) (V) 0 Vout (max) (V) 5.5 Data rate (max) (Mbps) 100 IOH (max) (mA) -16 IOL (max) (mA) -16 Supply current (max) (µA) 5.5 Features 32 Input type TTL-Compatible CMOS Output type 3-State, Balanced CMOS Rating Automotive Operating temperature range (°C) -40 to 125
Technology family LV-A Applications GPIO Bits (#) 4 Configuration 4 Ch A to B 0 Ch B to A High input voltage (min) (V) 1 High input voltage (max) (V) 5.5 Vout (min) (V) 0 Vout (max) (V) 5.5 Data rate (max) (Mbps) 100 IOH (max) (mA) -16 IOL (max) (mA) -16 Supply current (max) (µA) 5.5 Features 32 Input type TTL-Compatible CMOS Output type 3-State, Balanced CMOS Rating Automotive Operating temperature range (°C) -40 to 125
TSSOP (PW) 14 32 mm² 5 x 6.4
  • AEC-Q100 qualified for automotive applications:

    • Device temperature grade 1: -40°C to +125°C

    • Device HBM ESD classification level 2

    • Device CDM ESD classifcation level C4B

  • Wide operating range of 1.8 V to 5.5 V

  • Single-supply voltage translator (refer to LVxT Enhanced Input Voltage):

    • Up translation:

      • 1.2 V to 1.8 V

      • 1.5 V to 2.5 V

      • 1.8 V to 3.3 V

      • 3.3 V to 5.0 V

    • Down translation:

      • 5.0 V, 3.3 V, 2.5 V to 1.8 V
      • 5.0 V, 3.3 V to 2.5 V
      • 5.0 V to 3.3 V
  • 5.5-V tolerant input pins
  • Supports standard pinouts
  • Up to 150 Mbps with 5-V or 3.3-V VCC
  • Latch-up performance exceeds 250 mA per JESD 17
  • AEC-Q100 qualified for automotive applications:

    • Device temperature grade 1: -40°C to +125°C

    • Device HBM ESD classification level 2

    • Device CDM ESD classifcation level C4B

  • Wide operating range of 1.8 V to 5.5 V

  • Single-supply voltage translator (refer to LVxT Enhanced Input Voltage):

    • Up translation:

      • 1.2 V to 1.8 V

      • 1.5 V to 2.5 V

      • 1.8 V to 3.3 V

      • 3.3 V to 5.0 V

    • Down translation:

      • 5.0 V, 3.3 V, 2.5 V to 1.8 V
      • 5.0 V, 3.3 V to 2.5 V
      • 5.0 V to 3.3 V
  • 5.5-V tolerant input pins
  • Supports standard pinouts
  • Up to 150 Mbps with 5-V or 3.3-V VCC
  • Latch-up performance exceeds 250 mA per JESD 17

The SN74LV4T125-Q1 contains four independent buffers with 3-state outputs and extended voltage operation to allow for level translation. Each buffer performs the Boolean function Y = A in positive logic. The outputs can be put into a high impedance (Hi-Z) state by applying a HIGH on the OE pin. The output level is referenced to the supply voltage (VCC) and supports 1.8-V, 2.5-V, 3.3-V, and 5-V CMOS levels.

The input is designed with a lower threshold circuit to support up translation for lower voltage CMOS inputs (for example, 1.2 V input to 1.8 V output or 1.8 V input to 3.3 V output). In addition, the 5-V tolerant input pins enable down translation (for example, 3.3 V to 2.5 V output).

The SN74LV4T125-Q1 contains four independent buffers with 3-state outputs and extended voltage operation to allow for level translation. Each buffer performs the Boolean function Y = A in positive logic. The outputs can be put into a high impedance (Hi-Z) state by applying a HIGH on the OE pin. The output level is referenced to the supply voltage (VCC) and supports 1.8-V, 2.5-V, 3.3-V, and 5-V CMOS levels.

The input is designed with a lower threshold circuit to support up translation for lower voltage CMOS inputs (for example, 1.2 V input to 1.8 V output or 1.8 V input to 3.3 V output). In addition, the 5-V tolerant input pins enable down translation (for example, 3.3 V to 2.5 V output).

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* Data sheet SN74LV4T125-Q1 Automotive Quadruple Buffer Translator With 3-State Outputs datasheet (Rev. A) PDF | HTML 2022年 6月 16日
Application note Understanding Transient Drive Strength vs. DC Drive Strength in CMOS Output Buffers PDF | HTML 2024年 5月 14日

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