TCAN1043-Q1

現行

具有靈活數據速率和喚醒輸入的汽車 CAN FD 收發器

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TCAN1043A-Q1 現行 具有喚醒/抑制/休眠功能的車用 CAN FD 收發器 Alternative packaging and enhanced features

產品詳細資料

Protocols CAN, CAN FD Number of channels 1 Supply voltage (V) 4.5 to 5.5 Bus fault voltage (V) -58 to 58 Signaling rate (max) (Bits) 2000000 Rating Automotive
Protocols CAN, CAN FD Number of channels 1 Supply voltage (V) 4.5 to 5.5 Bus fault voltage (V) -58 to 58 Signaling rate (max) (Bits) 2000000 Rating Automotive
SOIC (D) 14 51.9 mm² 8.65 x 6 VSON (DMT) 14 13.5 mm² 4.5 x 3
  • AEC Q100: Qualified for automotive applications
    • Temperature Grade 1: –55°C to 125°C, T A
    • Device HBM classification level: ±16 kV
    • Device CDM classification level: ±1500 V
  • Functional Safety-Capable
  • Meets the requirements of the ISO 11898-2 (2016)
  • All devices support classic CAN and 2Mbps CAN FD (flexible data rate) and "G" options support 5Mbps
    • Short and symmetrical propagation delays and fast loop times for enhanced timing margin
    • Higher data rates in loaded CAN networks
  • V IO Level shifting supports 2.8 V to 5.5 V
  • Operating modes
    • Normal mode
    • Standby Mode with INH output and local and remote wake up request
    • Low power sleep mode with INH output and local and remote wake up request
  • Passive behavior when unpowered
    • Bus and logic terminals are high impedance (no load to operating bus or application)
    • Hot plug capable: power up and down glitch free operation on bus and RXD output
  • Meets or exceeds EMC standard requirements
    • IEC 62228-3 – 2007 compliant
    • SAE J2962-2 compliant
  • Protection features
    • IEC ESD protection of bus terminals: ±8 kV
    • Bus fault protection: ±58 V (non-H variants) and ±70 V (H variants)
    • Undervoltage protection on supply terminals
    • Driver dominant time Out (TXD DTO): data rates down to 9.2 kbps
    • Thermal shutdown protection (TSD)
  • Receiver common mode input voltage: ±30 V
  • Typical loop delay: 110 ns
  • Junction temperatures from –55°C to 150°C
  • Available in SOIC (14) package and leadless VSON (14) package (4.5 mm x 3 mm) with improved automated optical inspection (AOI) capability
  • AEC Q100: Qualified for automotive applications
    • Temperature Grade 1: –55°C to 125°C, T A
    • Device HBM classification level: ±16 kV
    • Device CDM classification level: ±1500 V
  • Functional Safety-Capable
  • Meets the requirements of the ISO 11898-2 (2016)
  • All devices support classic CAN and 2Mbps CAN FD (flexible data rate) and "G" options support 5Mbps
    • Short and symmetrical propagation delays and fast loop times for enhanced timing margin
    • Higher data rates in loaded CAN networks
  • V IO Level shifting supports 2.8 V to 5.5 V
  • Operating modes
    • Normal mode
    • Standby Mode with INH output and local and remote wake up request
    • Low power sleep mode with INH output and local and remote wake up request
  • Passive behavior when unpowered
    • Bus and logic terminals are high impedance (no load to operating bus or application)
    • Hot plug capable: power up and down glitch free operation on bus and RXD output
  • Meets or exceeds EMC standard requirements
    • IEC 62228-3 – 2007 compliant
    • SAE J2962-2 compliant
  • Protection features
    • IEC ESD protection of bus terminals: ±8 kV
    • Bus fault protection: ±58 V (non-H variants) and ±70 V (H variants)
    • Undervoltage protection on supply terminals
    • Driver dominant time Out (TXD DTO): data rates down to 9.2 kbps
    • Thermal shutdown protection (TSD)
  • Receiver common mode input voltage: ±30 V
  • Typical loop delay: 110 ns
  • Junction temperatures from –55°C to 150°C
  • Available in SOIC (14) package and leadless VSON (14) package (4.5 mm x 3 mm) with improved automated optical inspection (AOI) capability

The TCAN1043xx-Q1 meets the physical layer requirements of the ISO 11898–2 (2016) High Speed Controller Area Network (CAN) specification providing an interface between the CAN bus and the CAN protocol controller. These devices support both classical CAN and CAN FD up to 2 megabits per second (Mbps). Devices with part numbers that include the suffix “G” are designed for CAN FD data rates up to 5Mbps. The TCAN1043xx-Q1 allows for system-level reductions in battery current consumption by selectively enabling (via the INH output pin) the various power supplies that can be present on a node. This allows an ultra-low-current sleep state in which power is gated to all system components except for the TCAN1043xx-Q1, which remains in a low-power state monitoring the CAN bus.

When a wake-up pattern is detected on the bus or when a local wake-up is requested via the WAKE input, the TCAN1043xx-Q1 initiates node start-up by driving INH high. The TCAN1043xx-Q1 includes internal logic level translation via the V IO terminal to allow for interfacing directly to 3.3 V or 5 V controllers. The device includes many protection and diagnostic features including CAN bus line short-circuit detection and battery connection detection. The TCAN1043xx-Q1 meets the ESD and EMC requirements of IEC 62228-3 and J2962-2 without the need for additional protection components.

The TCAN1043xx-Q1 meets the physical layer requirements of the ISO 11898–2 (2016) High Speed Controller Area Network (CAN) specification providing an interface between the CAN bus and the CAN protocol controller. These devices support both classical CAN and CAN FD up to 2 megabits per second (Mbps). Devices with part numbers that include the suffix “G” are designed for CAN FD data rates up to 5Mbps. The TCAN1043xx-Q1 allows for system-level reductions in battery current consumption by selectively enabling (via the INH output pin) the various power supplies that can be present on a node. This allows an ultra-low-current sleep state in which power is gated to all system components except for the TCAN1043xx-Q1, which remains in a low-power state monitoring the CAN bus.

When a wake-up pattern is detected on the bus or when a local wake-up is requested via the WAKE input, the TCAN1043xx-Q1 initiates node start-up by driving INH high. The TCAN1043xx-Q1 includes internal logic level translation via the V IO terminal to allow for interfacing directly to 3.3 V or 5 V controllers. The device includes many protection and diagnostic features including CAN bus line short-circuit detection and battery connection detection. The TCAN1043xx-Q1 meets the ESD and EMC requirements of IEC 62228-3 and J2962-2 without the need for additional protection components.

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技術文件

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類型 標題 日期
* Data sheet TCAN1043xx-Q1 Low-Power Fault Protected CAN Transceiver with CAN FD and Wake datasheet (Rev. F) PDF | HTML 2023年 11月 10日
Application note Protecting Automotive CAN Bus Systems From ESD Overvoltage Events PDF | HTML 2022年 4月 27日
Functional safety information TCAN1043xx-Q1 Functional Safety, FIT Rate, Failure Mode Distribution and Pin FMA (Rev. A) PDF | HTML 2021年 4月 7日
Application note TPS65313-Q1 and TPS65653-Q1 LDO free power solution for AWR1642/AWR1843 2020年 1月 27日
User guide TCAN1043HG-Q1 Evaluation Module 2017年 10月 30日

設計與開發

如需其他條款或必要資源,請按一下下方的任何標題以檢視詳細頁面 (如有)。

開發板

TCAN1043AEVM — 適用於具備匯流排濾波、nFAULT和狀態評估之 DYY CAN 收發器的 TCAN1043A 評估模組

TI TCAN1043AEVM 協助使用者評估採用 DYY 封裝之 TCAN1043A-Q1 與 TCAN1043M-Q1 CAN FD 收發器的運作與性能。

使用 VIO、EN、INH、nSTB、VSUP、WAKE、和 nFAULT 針腳執行系統級評估的能力可在 EVM 上付諸實現。此外也提供匯流排終端、匯流排濾波及保護零組件。

使用指南: PDF | HTML
TI.com 無法提供
開發板

TCAN1043DEVM — 具 CAN FD 評估模組的 TCAN1043xx-Q1 低功耗故障保護 CAN 收發器

The TI TCAN1043xx-Q1 EVM helps designers evaluate the operation and performance of the TCAN1043xx-Q1 CAN FD transceiver. The ability to perform system-level evaluation using the VIO, EN, INH, nSTB, VSUP, WAKE, and nFAULT pins can be realized on the EVM. It also provides bus termination, bus (...)

使用指南: PDF
TI.com 無法提供
開發板

TCAN1463EVM — 適用車用低功耗訊號改善 CAN FD 收發器的 TCAN1463-Q1 評估模組

此 EVM 已安裝 TCAN1463DRQ1,且可用於在訊號改善網路中評估收發器的運作。您可依使用者指南中所述,更換 EVM 上的收發器並設定跨接器,以配置此 EVM 以搭配 TCAN1043HG-Q1、TCAN1043G-Q1、TCAN1043H-Q1、TCAN1043A-Q1 和 TCAN1043-Q1 14 針腳 CAN 收發器使用。

使用指南: PDF
TI.com 無法提供
模擬型號

TCAN1043 IBIS Model

SLLM394.ZIP (52 KB) - IBIS Model
模擬工具

PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
模擬工具

TINA-TI — 基於 SPICE 的類比模擬程式

TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
使用指南: PDF
參考設計

TIDEP-01020 — 適用於閘道、輔助和自動化駕駛系統的汽車領域控制器參考設計

Decentralized vehicle architectures on the road today use individual ECUs that lack processing power and high-speed interfaces to handle the complex tasks and data movement needs of newly emerging automotive architectures. Higher level functions require the right combination of DMIPS, data (...)
Design guide: PDF
電路圖: PDF
參考設計

TIDEP-01002 — 採用 Jacinto™ 車用處理器的物美價廉數位叢集汽車參考設計

The Jacinto™ automotive processor Digital Cluster Automotive Reference Design (DCARD) is a cost-optimized design for reconfigurable digital cluster systems.  DCARD is a complete and self-contained 6-layer PCB design to enable 60fps digital cluster solutions on 1920x720 resolution (...)
Design guide: PDF
電路圖: PDF
封裝 引腳 下載
SOIC (D) 14 檢視選項
VSON (DMT) 14 檢視選項

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  • 鉛塗層/球物料
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  • MTBF/FIT 估算值
  • 材料內容
  • 資格摘要
  • 進行中可靠性監測
內含資訊:
  • 晶圓廠位置
  • 組裝地點

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