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數據轉換器
數位轉類比轉換器 (DAC)
精密 DAC (≤10 MSPS)

TLV5632

現行

8 位元 8 通道 1/3 us DAC 系列輸入、可編程安定時間/功耗、低功耗、斷電、內部參考

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產品規格表

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功能相同，但引腳輸出與所比較的產品不同
DAC43508 現行 具有 SPI 的八路、8 位元、緩衝電壓輸出 DAC Lower power, smaller 3mm × 3mm QFN package

TLV5632

現行
產品規格表 立即訂購

產品詳細資料

Resolution (Bits) 8 Number of DAC channels 8 Interface type SPI Output type Buffered Voltage Settling time (µs) 1 Features SDO Reference type Ext, Int Architecture String Rating Catalog Output range (max) (mA/V) 5.1 Output range (min) (mA/V) 0 Sample/update rate (Msps) 0.283 Power consumption (typ) (mW) 18 Operating temperature range (°C) -40 to 85
Resolution (Bits) 8 Number of DAC channels 8 Interface type SPI Output type Buffered Voltage Settling time (µs) 1 Features SDO Reference type Ext, Int Architecture String Rating Catalog Output range (max) (mA/V) 5.1 Output range (min) (mA/V) 0 Sample/update rate (Msps) 0.283 Power consumption (typ) (mW) 18 Operating temperature range (°C) -40 to 85
SOIC (DW) 20 131.84 mm² 12.8 x 10.3 TSSOP (PW) 20 41.6 mm² 6.5 x 6.4
  • Eight Voltage Output DACs in One Package
    • TLV5630 . . .12-Bit
    • TLV5631 . . .10-Bit
    • TLV5632 . . .8-Bit
    • 1 µs in Fast Mode
    • 3 µs in Slow Mode
  • Programmable Settling Time vs Power
    Consumption
    • 1 µs in Fast Mode
    • 3 µs in Slow Mode
    • 18 mW in Slow Mode at 3 V
    • 48 mW in Fast Mode at 3 V
  • Compatible With TMS320 and SPI Serial Ports
  • Monotonic Over Temperature
  • Low Power Consumption:
    • 18 mW in Slow Mode at 3 V
    • 48 mW in Fast Mode at 3 V
  • Power-Down Mode
  • Internal Reference
  • Data Output for Daisy-Chaining
  • APPLICATIONS
    • Digital Servo Control Loops
    • Digital Offset and Gain Adjustment
    • Industrial Process Control
    • Machine and Motion Control Devices
    • Mass Storage Devices
  • Eight Voltage Output DACs in One Package
    • TLV5630 . . .12-Bit
    • TLV5631 . . .10-Bit
    • TLV5632 . . .8-Bit
    • 1 µs in Fast Mode
    • 3 µs in Slow Mode
  • Programmable Settling Time vs Power
    Consumption
    • 1 µs in Fast Mode
    • 3 µs in Slow Mode
    • 18 mW in Slow Mode at 3 V
    • 48 mW in Fast Mode at 3 V
  • Compatible With TMS320 and SPI Serial Ports
  • Monotonic Over Temperature
  • Low Power Consumption:
    • 18 mW in Slow Mode at 3 V
    • 48 mW in Fast Mode at 3 V
  • Power-Down Mode
  • Internal Reference
  • Data Output for Daisy-Chaining
  • APPLICATIONS
    • Digital Servo Control Loops
    • Digital Offset and Gain Adjustment
    • Industrial Process Control
    • Machine and Motion Control Devices
    • Mass Storage Devices

The TLV5630, TLV5631, and TLV5632 are pin-compatible, eight-channel, 12-/10-/8-bit voltage output DACs each with a flexible serial interface. The serial interface allows glueless interface to TMS320 and SPI, QSPI, and Microwire serial ports. It is programmed with a 16-bit serial string containing 4 control and 12 data bits.

Additional features are a power-down mode, an LDAC input for simultaneous update of all eight DAC outputs, and a data output which can be used to cascade multiple devices, and an internal programmable band-gap reference.

The resistor string output voltage is buffered by a rail-to-rail output amplifier with a programmable settling time to allow the designer to optimize speed vs power dissipation. The buffered, high-impedance reference input can be connected to the supply voltage.

Implemented with a CMOS process, the DACs are designed for single-supply operation from 2.7 V to 5.5 V, and can operate on two separate analog and digital power supplies. The devices are available in 20-pin SOIC and TSSOP packages.

The TLV5630, TLV5631, and TLV5632 are pin-compatible, eight-channel, 12-/10-/8-bit voltage output DACs each with a flexible serial interface. The serial interface allows glueless interface to TMS320 and SPI, QSPI, and Microwire serial ports. It is programmed with a 16-bit serial string containing 4 control and 12 data bits.

Additional features are a power-down mode, an LDAC input for simultaneous update of all eight DAC outputs, and a data output which can be used to cascade multiple devices, and an internal programmable band-gap reference.

The resistor string output voltage is buffered by a rail-to-rail output amplifier with a programmable settling time to allow the designer to optimize speed vs power dissipation. The buffered, high-impedance reference input can be connected to the supply voltage.

Implemented with a CMOS process, the DACs are designed for single-supply operation from 2.7 V to 5.5 V, and can operate on two separate analog and digital power supplies. The devices are available in 20-pin SOIC and TSSOP packages.
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* Data sheet 8-Channel, 12-/10-/8-Bit, 2.7-V to 5.5-V, Low Power DAC with Power Down datasheet (Rev. F) 2008年 11月 14日

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計算工具

ANALOG-ENGINEER-CALC — 類比工程師計算機

The Analog Engineer’s Calculator is designed to speed up many of the repetitive calculations that analog circuit design engineers use on a regular basis. This PC-based tool provides a graphical interface with a list of various common calculations ranging from setting op-amp gain with feedback (...)
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模擬工具

PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
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模擬工具

TINA-TI — 基於 SPICE 的類比模擬程式

TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
使用指南: PDF
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SOIC (DW) 20 檢視選項
TSSOP (PW) 20 檢視選項
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