TS3A24159
- Specified break-before-make switching
- Low ON-state resistance (0.3 Ω maximum)
- Low charge injection
- Excellent ON-state resistance matching
- Low total harmonic distortion (THD)
- 1.65-V to 3.6-V single-supply operation
- Control inputs are 1.8-V logic compatible
- Latch-up performance exceeds 100 mA per JESD 78, Class II
- ESD performance tested per JESD 22
- 2000-V Human-Body Model (A114-B, Class II)
- 1000-V Charged-Device Model (C101)
The TS3A24159 is a 2-channel single-pole double-throw (SPDT) bidirectional analog switch that is designed to operate from 1.65 V to 3.6 V. It offers low ON-state resistance and excellent ON-state resistance matching with the break-before-make feature, to prevent signal distortion during the transferring of a signal from one channel to another. The device has excellent total harmonic distortion (THD) performance, low ON-state resistence, and consumes very low power. These are some of the features that make this device suitable for a variety of markets and many different applications.
技術文件
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檢視所有 7 | 類型 | 標題 | 日期 | ||
|---|---|---|---|---|
| * | Data sheet | TS3A24159 0.3-Ω 2-Channel SPDT Bidirectional Analog Switch Dual-Channel 2:1 Multiplexer and Demultiplexer datasheet (Rev. H) | PDF | HTML | 2022年 8月 2日 |
| Application brief | 1.8-V Logic for Multiplexers and Signal Switches (Rev. C) | PDF | HTML | 2022年 7月 26日 | |
| Application note | Selecting the Correct Texas Instruments Signal Switch (Rev. E) | PDF | HTML | 2022年 6月 2日 | |
| Application note | Multiplexers and Signal Switches Glossary (Rev. B) | PDF | HTML | 2021年 12月 1日 | |
| Application brief | Improving Pulse Oximeter Solution Performance without Sacrificing Size (Rev. A) | PDF | HTML | 2021年 4月 26日 | |
| Application note | Preventing Excess Power Consumption on Analog Switches | 2008年 7月 3日 | ||
| Application note | Semiconductor Packing Material Electrostatic Discharge (ESD) Protection | 2004年 7月 8日 |
設計與開發
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介面轉接器
LEADED-ADAPTER1 — 適用於快速測試 TI 的 5、8、10、16 及 24 針腳引線封裝的表面貼裝至 DIP 接頭適配器
The EVM-LEADED1 board allows for quick testing and bread boarding of TI's common leaded packages. The board has footprints to convert TI's D, DBQ, DCT,DCU, DDF, DGS, DGV, and PW surface mount packages to 100mil DIP headers.
使用指南: PDF
介面轉接器
LEADLESS-ADAPTER1 — 用於測試 TI 的 6、8、10、12、14、16 和 20 針腳無引線封裝的表面貼裝至 DIP 接頭適配器
The EVM-LEADLESS1 board allows for quick testing and bread boarding of TI's common leadless packages. The board has footprints to convert TI's DRC, DTP, DQE, RBW, RGY, RSE, RSV, RSW RTE, RTJ, RUK , RUC, RUG, RUM,RUT and YZP surface mount packages to 100mil DIP headers.
使用指南: PDF
參考設計
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參考設計
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參考設計
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| 封裝 | 引腳 | 下載 |
|---|---|---|
| DSBGA (YZP) | 10 | 檢視選項 |
| VSON (DRC) | 10 | 檢視選項 |
| VSSOP (DGS) | 10 | 檢視選項 |
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