When a new conversion is started, the ADC provides a delay before the actual start of the conversion. This timed delay is provided to allow for the integrated analog anti-alias filter to settle. In some cases more delay is required to allow for external settling effects. The delay time can be configured to automatically delay the start of a conversion after a START command is sent, the START/SYNC pin is taken high, or a WREG command is sent to change any configuration register from address 03h to 07h is issued (as described in the WREG section). The programmable conversion delay is intended to accommodate the analog settling time on the inputs (for example, when changing a multiplexer channel). Use the DELAY[2:0] bits in the gain setting register (03h) to program a delay time ranging from 1 · tMOD to 4096 · tMOD (where tMOD = 16 · tCLK). The default programmable conversion delay setting is 14 · tMOD.