SLAS918B December   2012  – April 2022 ADS54T01

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Device Comparison
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Electrical Characteristics
    6. 7.6  Electrical Characteristics
    7. 7.7  Electrical Characteristics
    8. 7.8  Electrical Characteristics
    9. 7.9  Electrical Characteristics
    10. 7.10 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  Test Pattern Output
      2. 8.3.2  Clock Inputs
      3. 8.3.3  SNR and Clock Jitter
      4. 8.3.4  Analog Inputs
      5. 8.3.5  Over-Range Indication
      6. 8.3.6  Interleaving Correction
      7. 8.3.7  High-Resolution Output Data
      8. 8.3.8  Low-Resolution Output Data
      9. 8.3.9  Full Speed – 7 Bit
      10. 8.3.10 Decimated Low-Resolution Output Data
      11. 8.3.11 Multi Device Synchronization
    4. 8.4 Device Functional Modes
      1. 8.4.1 Power-Down Modes
      2. 8.4.2 Feedback Mode: Burst Mode
      3. 8.4.3 Receive Mode: Decimation Filter
      4. 8.4.4 Manual Trigger Mode
      5. 8.4.5 Auto Trigger Mode
    5. 8.5 Programming
      1. 8.5.1 Device Initialization
      2. 8.5.2 Serial Register Write
      3. 8.5.3 Serial Register Readout
    6. 8.6 Register Maps
      1. 8.6.1 Serial Register Map
      2. 8.6.2 Description of Serial Interface Registers
  9. 9 Power Supply Recommendations
  10. 10Device and Documentation Support
    1. 10.1 Receiving Notification of Documentation Updates
    2. 10.2 Support Resources
    3. 10.3 Trademarks
    4. 10.4 Electrostatic Discharge Caution
    5. 10.5 Glossary
  11. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8.3.8 Low-Resolution Output Data

There are two different options for the low-resolution output data and the selection is made through SPI register control. The data can either be output at full speed (ADC sampling rate) with the output resolution limited to 7 bit (7 MSBs). Alternatively the output resolution can be selected to 11 bit (11 MSBs) but at a reduced effective data rate where every 4th sample gets repeated four times.