SBAS580D May   2013  – March 2018 ADS7250 , ADS7850 , ADS8350

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Functional Block Diagram
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics: All Devices
    6. 6.6  Electrical Characteristics: ADS7250
    7. 6.7  Electrical Characteristics: ADS7850
    8. 6.8  Electrical Characteristics: ADS8350
    9. 6.9  Timing Requirements
    10. 6.10 Switching Characteristics
    11. 6.11 Typical Characteristics: ADS7250
    12. 6.12 Typical Characteristics: ADS7850
    13. 6.13 Typical Characteristics: ADS8350
    14. 6.14 Typical Characteristics: All Devices
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Reference
      2. 7.3.2 Analog Input
        1. 7.3.2.1 Analog Input Full-Scale Range
      3. 7.3.3 ADC Transfer Function
    4. 7.4 Device Functional Modes
      1. 7.4.1 Serial Interface
      2. 7.4.2 Short-Cycling, Frame Abort, and Reconversion Feature
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 DAQ Circuit: Maximum SINAD for a 10-kHz Input Signal at 750-kSPS Throughput
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1 ADC Reference Driver
          2. 8.2.1.2.2 ADC Input Driver
            1. 8.2.1.2.2.1 Input Amplifier Selection
            2. 8.2.1.2.2.2 Antialiasing Filter
        3. 8.2.1.3 Application Curve
      2. 8.2.2 DAQ Circuit: Maximum SINAD for a 100-kHz Input Signal at 750-kSPS Throughput
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Detailed Design Procedure
          1. 8.2.2.2.1 ADC Reference Driver
          2. 8.2.2.2.2 ADC Input Driver
        3. 8.2.2.3 Application Curve
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Related Links
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 Community Resources
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.3.2.1 Analog Input Full-Scale Range

The analog input full-scale range (FSR) for ADC_A and ADC_B is twice the reference voltage provided to the particular ADC. By providing different reference voltages (VREFIN_A and VREFIN_B), ADC_A and ADC_B can have different full-scale input ranges. Therefore, the FSR for ADC_A and ADC_B can be determined by Equation 1 and Equation 2, respectively:

Equation 1. FSR_ADC_A = 2 × VREFIN_A,
VAINP_A = 0 to 2 × VREFIN_A,
VAINM_A = VREFIN_A

The REFIN_A and AINM_A pins must be shorted and connected to the external reference voltage, VREFIN_A.

Equation 2. FSR_ADC_B = 2 × VREFIN_B,
VAINP_B = 0 to 2 × VREFIN_B,
VAINM_B = VREFIN_B

The REFIN_B and AINM_B pins must be shorted and connected to the external reference voltage, VREFIN_B.

To use the full dynamic input range on the analog input pins, AVDD must be as shown in Equation 3, Equation 4, and Equation 5:

Equation 3. AVDD ≥ 2 × VREFIN_A
Equation 4. AVDD ≥ 2 × VREFIN_B
Equation 5. 4.5 V ≤ AVDD ≤ 5.5 V