SBAS547D May   2013  – August 2015 ADS8881

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Companion Products
  6. Device Comparison
  7. Pin Configurations and Functions
  8. Specifications
    1. 8.1 Absolute Maximum Ratings
    2. 8.2 ESD Ratings
    3. 8.3 Recommended Operating Conditions
    4. 8.4 Thermal Information
    5. 8.5 Electrical Characteristics
    6. 8.6 Timing Requirements: 3-Wire Operation
    7. 8.7 Timing Requirements: 4-Wire Operation
    8. 8.8 Timing Requirements: Daisy-Chain
    9. 8.9 Typical Characteristics
  9. Parametric Measurement Information
    1. 9.1 Equivalent Circuits
  10. 10Detailed Description
    1. 10.1 Overview
    2. 10.2 Functional Block Diagram
    3. 10.3 Feature Description
      1. 10.3.1 Analog Input
      2. 10.3.2 Reference
      3. 10.3.3 Clock
      4. 10.3.4 ADC Transfer Function
    4. 10.4 Device Functional Modes
      1. 10.4.1 CS Mode
        1. 10.4.1.1 3-Wire CS Mode Without a Busy Indicator
        2. 10.4.1.2 3-Wire CS Mode With a Busy Indicator
        3. 10.4.1.3 4-Wire CS Mode Without a Busy Indicator
        4. 10.4.1.4 4-Wire CS Mode With a Busy Indicator
      2. 10.4.2 Daisy-Chain Mode
        1. 10.4.2.1 Daisy-Chain Mode Without a Busy Indicator
        2. 10.4.2.2 Daisy-Chain Mode With a Busy Indicator
  11. 11Application and Implementation
    1. 11.1 Application Information
      1. 11.1.1 ADC Reference Driver
      2. 11.1.2 ADC Input Driver
        1. 11.1.2.1 Input Amplifier Selection
        2. 11.1.2.2 Antialiasing Filter
    2. 11.2 Typical Applications
      1. 11.2.1 DAQ Circuit for a 1-µs, Full-Scale Step Response
        1. 11.2.1.1 Design Requirements
        2. 11.2.1.2 Detailed Design Procedure
        3. 11.2.1.3 Application Curve
      2. 11.2.2 Low-Power DAQ Circuit for Excellent Dynamic Performance at 1 MSPS
        1. 11.2.2.1 Design Requirements
        2. 11.2.2.2 Detailed Design Procedure
        3. 11.2.2.3 Application Curve
      3. 11.2.3 DAQ Circuit for Lowest Distortion and Noise Performance at 1 MSPS
        1. 11.2.3.1 Design Requirements
        2. 11.2.3.2 Detailed Design Procedure
        3. 11.2.3.3 Application Curve
      4. 11.2.4 Ultralow-Power DAQ Circuit at 10 kSPS
        1. 11.2.4.1 Design Requirements
        2. 11.2.4.2 Detailed Design Procedure
        3. 11.2.4.3 Application Curve
  12. 12Power-Supply Recommendations
    1. 12.1 Power-Supply Decoupling
    2. 12.2 Power Saving
  13. 13Layout
    1. 13.1 Layout Guidelines
    2. 13.2 Layout Example
  14. 14Device and Documentation Support
    1. 14.1 Device Support
      1. 14.1.1 Development Support
    2. 14.2 Documentation Support
      1. 14.2.1 Related Documentation
    3. 14.3 Receiving Notification of Documentation Updates
    4. 14.4 Community Resources
    5. 14.5 Trademarks
    6. 14.6 Electrostatic Discharge Caution
    7. 14.7 Glossary
  15. 15Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

4 Revision History

Changes from C Revision (July 2014) to D Revision

  • Added Companion Products and Device Comparison sectionsGo
  • Changed ESD Ratings table to current standards, added HBM and CDM data Go
  • Added timing specifications for different operating temperature ranges for the tconv, td-CK-DO, and tquiet parameters in the Timing Requirements: 3-Wire Operation table Go
  • Added timing specifications for different operating temperature ranges for the tconv parameter in Timing Requirements: 4-Wire Operation tableGo
  • Added timing specifications for different operating temperature ranges for the tconv parameter in Timing Requirements: Daisy-Chain table Go

Changes from B Revision (December 2014) to C Revision

  • Changed format to meet latest data sheet standards; added new sections, moved existing sections Go
  • Changed ADS8881 to ADS8881C, added ADS8881I Go
  • Separated ADS8881C and ADS8881I specifications in Excellent AC and DC Performance Features bulletGo
  • Changed Device Information table to current standardsGo
  • Added Recommended Operating Conditions tableGo
  • Changed LSB footnote to include how to convert LSB to ppm Go
  • Changed fSCLK parameter maximum specification from 66.6 MHz to 70 MHz in Timing Requirements: 3-Wire Operation table.Go
  • Changed tSCLK parameter minimum specification from 15 ns to 14.3 ns in Timing Requirements: 3-Wire Operation table.Go
  • Added more information about validity of data on SCLK edges in all interface modesGo
  • Changed diagrams and text for better explanation of the daisy-chain feature in the Daisy-Chain Mode sectionGo
  • Changed Equation 2 and Equation 3 Go
  • Added Layout Guidelines sectionGo

Changes from A Revision (July 2013) to B Revision

  • Changed Wide Common-Mode Voltage Range Features bulletGo
  • Added note 2 to Family Information tableGo
  • Changed External Reference Input, Reference input current parameter typical specification from 350 to 300Go
  • Added External Reference Input, Reference leakage current parameter to Electrical CharacteristicsGo
  • Changed Power-Supply Requirements, Power-supply voltage parameter digital interface supply range as a function of SCLK in Electrical CharacteristicsGo
  • Added Digital Inputs, Digital input leakage current parameter to Electrical CharacteristicsGo
  • Added true-differential input feature details to Analog Input sectionGo
  • Deleted shading from Figure 64Go
  • Deleted shading from Figure 65Go
  • Deleted shading from Figure 67Go
  • Deleted shading from Figure 69Go
  • Deleted shading from Figure 70Go
  • Deleted shading from Figure 72Go
  • Added power scaling with throughput feature details to Power Saving sectionGo

Changes from * Revision (May 2013) to A Revision

  • Changed document status to Production Data; pre-RTM changes made throughout documentGo