SBASA41D february   2021  – june 2023 AFE7950

PRODUCTION DATA  

  1.   1
  2. 1Features
  3. 2Applications
  4. 3Description
  5. 4Description (continued)
  6. 5Revision History
  7. 6Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Transmitter Electrical Characteristics
    6. 6.6  RF ADC Electrical Characteristics
    7. 6.7  PLL/VCO/Clock Electrical Characteristics
    8. 6.8  Digital Electrical Characteristics
    9. 6.9  Power Supply Electrical Characteristics
    10. 6.10 Timing Requirements
    11. 6.11 Switching Characteristics
    12. 6.12 Typical Characteristics
      1. 6.12.1  TX Typical Characteristics 800 MHz
      2. 6.12.2  TX Typical Characteristics at 1.8 GHz
      3. 6.12.3  TX Typical Characteristics at 2.6 GHz
      4. 6.12.4  TX Typical Characteristics at 3.5 GHz
      5. 6.12.5  TX Typical Characteristics at 4.9 GHz
      6. 6.12.6  TX Typical Characteristics at 8.1 GHz
      7. 6.12.7  TX Typical Characteristics at 9.6 GHz
      8. 6.12.8  RX Typical Characteristics at 800 MHz
      9. 6.12.9  RX Typical Characteristics at 1.75 GHz – 1.9 GHz
      10. 6.12.10 RX Typical Characteristics at 2.6 GHz
      11. 6.12.11 RX Typical Characteristics at 3.5 GHz
      12. 6.12.12 RX Typical Characteristics at 4.9 GHz
      13. 6.12.13 RX Typical Characteristics at 8.1GHz
      14. 6.12.14 RX Typical Characteristics at 9.6 GHz
      15. 6.12.15 PLL and Clock Typical Characteristics
  8. 7Device and Documentation Support
    1. 7.1 Receiving Notification of Documentation Updates
    2. 7.2 Support Resources
    3. 7.3 Trademarks
    4. 7.4 Electrostatic Discharge Caution
    5. 7.5 Glossary
  9. 8Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

RX Typical Characteristics at 3.5 GHz

Typical values at TA = +25°C, ADC Sampling Rate = 2949.12 GHz. Default conditions: output sample rate = 491.52MSPS (decimate by 6), PLL clock mode with fREF = 491.52 MHz, AIN = –3 dBFS, DSA setting = 4 dB.

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With 3.6 GHz matching, normalized to 3.6 GHz
Figure 6-382 RX In-Band Gain Flatness, fIN = 3600 MHz
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With 3.6 GHz matching
Differential Amplitude Error = PIN(DSA Setting – 1) – PIN(DSA Setting) + 1
Figure 6-384 RX Uncalibrated Differential Amplitude Error vs DSA Setting at 3.6 GHz
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With 3.6 GHz matching
Integrated Amplitude Error = PIN(DSA Setting) – PIN(DSA Setting = 0) + (DSA Setting)
Figure 6-386 RX Uncalibrated Integrated Amplitude Error vs DSA Setting at 3.6 GHz
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With 3.6 GHz matching
Differential Phase Error = PhaseIN(DSA Setting – 1) – PhaseIN(DSA Setting)
Figure 6-388 RX Uncalibrated Phase Error vs DSA Setting at 3.6 GHz
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With 3.6 GHz matching
Integrated Phase Error = Phase(DSA Setting) – Phase(DSA Setting = 0)
Figure 6-390 RX Uncalibrated Integrated Phase Error vs DSA Setting at 3.6 GHz
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With 3.6 GHz matching , fIN = 3610 MHz, AIN = –3 dBFS
Figure 6-392 RX Output FFT at 3.6 GHz
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With 3.5 GHz matching, 20-MHz tone spacing
Figure 6-394 RX IMD3 vs Input Level and Temperature at 3.6 GHz
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With 3.5 GHz matching, DDC bypass mode (TI only mode for characterization)
Figure 6-396 RX HD2 vs DSA Setting and Temperature at 3.6 GHz
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With 3.5 GHz matching, DDC bypass mode (TI only mode for characterization)
Figure 6-398 RX HD2 vs Input Level and Temperature at 3.6 GHz
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With 3.5 GHz matching, DDC bypass mode (TI only mode for characterization)
Figure 6-400 RX HD3 vs DSA Setting and Temperature at 3.6 GHz
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With 3.5 GHz matching, DDC bypass mode (TI only mode for characterization)
Figure 6-402 RX HD3 vs Input Level and Temperature at 3.6 GHz
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With 3.5 GHz matching
Figure 6-404 RX In-Band SFDR (±200 MHz) vs Input Level and Channel at 3.6 GHz
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With 3.6 GHz matching, –7 dBFS each tone, 20-MHz tone spacing, all supplies at MIN, TYP, or MAX recommended operating voltages
Figure 6-406 RX IMD3 vs Supply Voltage and Channel at 3.6 GHz
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With 3.6 GHz matching, tone at –20 dBFS, 12.5-MHz offset frequency, all supplies at MIN, TYP, or MAX recommended operating voltages
Figure 6-408 RX Noise Spectral Density vs Supply Voltage and Channel at 3.6 GHz
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With 3.6 GHz matching, normalized to phase at 25°C
Figure 6-383 RX Input Phase vs Temperature at 3.6 GHz
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With 3.6 GHz matching
Differential Amplitude Error = PIN(DSA Setting – 1) – PIN(DSA Setting) + 1
Figure 6-385 RX Calibrated Differential Amplitude Error vs DSA Setting at 3.6 GHz
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With 3.6 GHz matching
Integrated Amplitude Error = PIN(DSA Setting) – PIN(DSA Setting = 0) + (DSA Setting)
Figure 6-387 RX Calibrated Integrated Amplitude Error vs DSA Setting at 3.6 GHz
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With 3.6 GHz matching
Differential Phase Error = PhaseIN(DSA Setting – 1) – PhaseIN(DSA Setting)
Figure 6-389 RX Calibrated Differential Phase Error vs DSA Setting at 3.6 GHz
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With 3.6 GHz matching
Integrated Phase Error = Phase(DSA Setting) – Phase(DSA Setting = 0)
Figure 6-391 RX Calibrated Integrated Phase Error vs DSA Setting at 3.6 GHz
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With 3.5 GHz matching, each tone at –7 dBFS, 20-MHz tone spacing
Figure 6-393 RX IMD3 vs DSA Setting and Temperature at 3.6 GHz
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With 3.5 GHz matching, DDC bypass mode (TI only mode for characterization)
Figure 6-395 RX HD2 vs DSA Setting and Channel at 3.6 GHz
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With 3.5 GHz matching, DDC bypass mode (TI only mode for characterization)
Figure 6-397 RX HD2 vs Input Level and Channel at 3.6 GHz
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With 3.5 GHz matching, DDC bypass mode (TI only mode for characterization)
Figure 6-399 RX HD3 vs DSA Setting and Channel at 3.6 GHz
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With 3.5 GHz matching, DDC bypass mode (TI only mode for characterization)
Figure 6-401 RX HD3 vs Input Level and Channel at 3.6 GHz
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With 3.5 GHz matching, 12.5-MHz offset from tone
Figure 6-403 RX Noise Spectral Density vs Input Level and DSA Setting at 3.6 GHz
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With 3.5 GHz matching
Figure 6-405 RX SFDR Excluding HD2/3 vs DSA Setting and Channel at 3.6 GHz
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With 3.6 GHz matching, –7 dBFS each tone, 20-MHz tone spacing, all supplies at MIN, TYP, or MAX recommended operating voltages
Figure 6-407 RX IMD5 vs Supply Voltage and Channel at 3.6 GHz