SLUSCE2D April 2016 – January 2019
PRODUCTION DATA.
The IC is alive after the IN voltage ramps above UVLO (see sleep mode), resets all logic and timers, and starts to perform many of the continuous monitoring routines. Typically the input voltage quickly rises through the UVLO and sleep states where the IC declares power good, starts the qualification charge at 100mA starts the safety timer and enables the CHG terminal. See Figure 6.