SLUS977B September   2009  – August 2015

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Input Overvoltage Protection
      2. 8.3.2 Input Overcurrent Protection
      3. 8.3.3 Battery Overvoltage Protection
      4. 8.3.4 Thermal Protection
      5. 8.3.5 Enable Function
      6. 8.3.6 PGATE Output
    4. 8.4 Device Functional Modes
      1. 8.4.1 OPERATION Mode
      2. 8.4.2 POWER-DOWN Mode
      3. 8.4.3 POWER-ON RESET Mode
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Selection of RBAT
        2. 9.2.2.2 Selection of RCE
        3. 9.2.2.3 Selection of Input and Output Bypass Capacitors
        4. 9.2.2.4 Selection of the PGATE External MOSFET
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Community Resources
    2. 12.2 Trademarks
    3. 12.3 Electrostatic Discharge Caution
    4. 12.4 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6 Pin Configuration and Functions

DSG Package
8-Pin WSON With Exposed Thermal Pad
Top View
bq24308 po_lus977.gif

Pin Functions

PIN I/O DESCRIPTION
NAME NO.
CE 5 I Chip enable input. Active low. When CE = High, the input FET is off. Internally pulled down.
ILIM 7 I Input overcurrent threshold programming. An optional external resistor can be used to increase input overcurrent threshold. Connect a resistor to VSS to increase the OCP threshold.
IN 1 I Input power, connect to external DC supply. Connect external 0.1μF (minimum) ceramic capacitor to VSS.
NC 4 — Do not connect to any external circuit. This pin may have internal connections used for test purposes.
OUT 8 O Output terminal to the charging system. Connect external 1-μF capacitor (minimum) ceramic capacitor to VSS.
PGATE 3 O Gate drive for optional external P-FET
VBAT 6 I Battery voltage sense input. Connect to pack positive terminal through a resistor.
VSS 2 — Ground terminal
Thermal Pad There is an internal electrical connection between the exposed thermal pad and the VSS pin of the device. The thermal pad must be connected to the same potential as the VSS pin on the printed-circuit board. Do not use the thermal pad as the primary ground input for the device. VSS pin must be connected to ground at all times.