SLUS900E December   2008  – August 2015

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 I2C Timing Requirements
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 IRQ Function
      2. 7.3.2 VBACK Switchover
      3. 7.3.3 Trickle Charge
    4. 7.4 Device Functional Modes
    5. 7.5 Programming
      1. 7.5.1 I2C Serial Interface
    6. 7.6 Register Maps
      1. 7.6.1 I2C Read After Backup Mode
      2. 7.6.2 Normal Register Descriptions
        1. 7.6.2.1  SECONDS Register (address = 0x00) [reset = 0XXXXXXb]
        2. 7.6.2.2  MINUTES Register (address = 0x01) [reset = 1XXXXXXb]
        3. 7.6.2.3  CENT_HOURS Register (address = 0x02) [reset = XXXXXXXXb]
        4. 7.6.2.4  DAY Register (address = 0x03) [reset = 00000XXXb]
        5. 7.6.2.5  DATE Register (address = 0x04) [reset = 00XXXXXXb]
        6. 7.6.2.6  MONTH Register (address = 0x05) [reset = 000XXXXXb]
        7. 7.6.2.7  YEARS Register (address = 0x06) [reset = XXXXXXXXb]
        8. 7.6.2.8  CAL_CFG1 Register (address = 0x07) [reset = 10000000b]
        9. 7.6.2.9  TCH2 Register (address = 0x08) [reset = 10010000b]
        10. 7.6.2.10 CFG2 Register (address = 0x09) [reset = 10101010b]
      3. 7.6.3 Special Function Registers
        1. 7.6.3.1 SF KEY 1 Register (address = 0x20) [reset = 00000000b]
        2. 7.6.3.2 SF KEY 2 Register (address = 0x21) [reset = 00000000b]
        3. 7.6.3.3 SFR Register (address = 0x22) [reset = 00000000b]
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Reading From a Register
        2. 8.2.2.2 Leap Year Compensation
        3. 8.2.2.3 Utilizing the Backup Supply
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Third-Party Products Disclaimer
    2. 11.2 Community Resources
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8 Application and Implementation

NOTE

Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.

8.1 Application Information

The typical application for the bq32000 is to provide precise time and date to a system. The backup power supply provides additional reliability by automatically switching over from the main supply when it drops under the voltage threshold.

8.2 Typical Application

The following design is a common application of the bq32000.

bq32000 typ_app_slus900.gifFigure 22. Typical Application Schematic

8.2.1 Design Requirements

The design requirement parameters are listed in the following table.

Table 5. Design Parameters

DESIGN PARAMETER REFERENCE EXAMPLE VALUE
Supply Voltage VCC 3.3 V
Backup Supply VBACK BR1225
Crystal Oscillator XT 32.768 kHz

8.2.2 Detailed Design Procedure

8.2.2.1 Reading From a Register

The report details the read-back of the SECONDS register. Figure 23 depicts the first condition that will be used as a benchmark to compare the values taken from the SECONDS register in the bq32000, to the oscilloscope’s internal PC time. In this example two modes of operation are demonstrated.

Condition 1. The main power supply, VCC, is greater than the backup power supply, VBACK, and the internal reference voltage, VREF. In this mode, the device's internal registers are fully operational with READ and WRITE access. Analyzing Figure 23, the known register values are compared to the system clock; in this case, the PC clock which is shown at the bottom of the screen capture.

The bq32000 during this condition is reading back [101][0010]= [5][2], which corresponds to 52 seconds at PC time of 2:22:43 PM.

Condition 2. VCC is now lowered to 2 V (VBACK > VCC). In this mode, the I2C communications are halted. However, the internal time keeping registers maintain full functional operation and accuracy which will be available to be reliably read by the controller 1 second after the RTC switches from VBACK to VCC supply.

Condition 3. During this final test condition, the RTC is restored to operate from the main power supply and I2C communications are now fully functional.

Figure 24 demonstrates a read-back value from the SECONDS register of [100][0101]= [4][5], or 45 seconds at PC time of 2:23:36 PM. This proves that the bq32000 managed to accurately maintain the time keeping registers functional while the VCC dropped below VBACK.

8.2.2.2 Leap Year Compensation

The BQ32000 classifies a leap year as any year that is evenly divisible by 4. Using this rule allows for reliable leap year compensation until 2100. Years that fall outside this rule will need to be compensated for by the external controller.

8.2.2.3 Utilizing the Backup Supply

In order for the bq32000 to achieve a low backup supply current as specified in the Electrical Characteristics, the VCC pin must be initialized after every total power loss situation. Initialization Is achieved by powering on VCC with a voltage between 3 to 3.6 V for at least 1 ms immediately after the backup supply is connected. If the VCC is not powered on while connecting the backup supply, then the expected leakage current from VBACK will be much greater than specified.

8.2.3 Application Curves

bq32000 scope_04_slus900.pngFigure 23. Master and Slave I2C Communication for the SECONDS Register
bq32000 scope_05_slus900.pngFigure 24. Master and Slave I2C Communication for the SECONDS Register After Recovering From the Backup Supply