SLUSCB3 July   2015


  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Description (continued)
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Electrical Characteristics: Supply Current
    6. 7.6  Electrical Characteristics: Power Supply Control
    7. 7.7  Electrical Characteristics: AFE Power-On Reset
    8. 7.8  Electrical Characteristics: AFE Watchdog Reset and Wake Timer
    9. 7.9  Electrical Characteristics: Current Wake Comparator
    10. 7.10 Electrical Characteristics: VC1, VC2, VC3, VC4, BAT, PACK
    11. 7.11 Electrical Characteristics: SMBD, SMBC
    12. 7.12 Electrical Characteristics: PRES, BTP_INT, DISP
    13. 7.13 Electrical Characteristics: LEDCNTLA, LEDCNTLB, LEDCNTLC
    14. 7.14 Electrical Characteristics: Coulomb Counter
    15. 7.15 Electrical Characteristics: CC Digital Filter
    16. 7.16 Electrical Characteristics: ADC
    17. 7.17 Electrical Characteristics: ADC Digital Filter
    18. 7.18 Electrical Characteristics: CHG, DSG FET Drive
    19. 7.19 Electrical Characteristics: PCHG FET Drive
    20. 7.20 Electrical Characteristics: FUSE Drive
    21. 7.21 Electrical Characteristics: Internal Temperature Sensor
    22. 7.22 Electrical Characteristics: TS1, TS2, TS3, TS4
    23. 7.23 Electrical Characteristics: PTC, PTCEN
    24. 7.24 Electrical Characteristics: Internal 1.8-V LDO
    25. 7.25 Electrical Characteristics: High-Frequency Oscillator
    26. 7.26 Electrical Characteristics: Low-Frequency Oscillator
    27. 7.27 Electrical Characteristics: Voltage Reference 1
    28. 7.28 Electrical Characteristics: Voltage Reference 2
    29. 7.29 Electrical Characteristics: Instruction Flash
    30. 7.30 Electrical Characteristics: Data Flash
    31. 7.31 Electrical Characteristics: OCD, SCC, SCD1, SCD2 Current Protection Thresholds
    32. 7.32 Timing Requirements: OCD, SCC, SCD1, SCD2 Current Protection Timing
    33. 7.33 Timing Requirements: SMBus
    34. 7.34 Timing Requirements: SMBus XL
    35. 7.35 Typical Characteristics
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  Primary (1st Level) Safety Features
      2. 8.3.2  Secondary (2nd Level) Safety Features
      3. 8.3.3  Charge Control Features
      4. 8.3.4  Gas Gauging
      5. 8.3.5  Configuration
        1. Oscillator Function
        2. System Present Operation
        3. Emergency Shutdown
        4. 1-Series, 2-Series, 3-Series, or 4-Series Cell Configuration
        5. Cell Balancing
      6. 8.3.6  Battery Parameter Measurements
        1. Charge and Discharge Counting
      7. 8.3.7  Battery Trip Point (BTP)
      8. 8.3.8  Lifetime Data Logging Features
      9. 8.3.9  Authentication
      10. 8.3.10 LED Display
      11. 8.3.11 Voltage
      12. 8.3.12 Current
      13. 8.3.13 Temperature
      14. 8.3.14 Communications
        1. SMBus On and Off State
        2. SBS Commands
    4. 8.4 Device Functional Modes
  9. Applications and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Applications
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. High-Current Path
          1. Protection FETs
          2. Chemical Fuse
          3. Lithium-Ion Cell Connections
          4. Sense Resistor
          5. ESD Mitigation
        2. Gas Gauge Circuit
          1. Coulomb-Counting Interface
          2. Power Supply Decoupling and PBI
          3. System Present
          4. SMBus Communication
          5. FUSE Circuitry
        3. Secondary-Current Protection
          1. Cell and Battery Inputs
          2. External Cell Balancing
          3. PACK and FET Control
          4. Temperature Output
          5. LEDs
          6. Safety PTC Thermistor
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
      1. 11.1.1 Protector FET Bypass and Pack Terminal Bypass Capacitors
      2. 11.1.2 ESD Spark Gap
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Community Resources
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8 Detailed Description

8.1 Overview

The bq40z50-R1 device, incorporating patented Impedance Track™ technology, provides cell balancing while charging or at rest. This fully integrated, single-chip, pack-based solution provides a rich array of features for gas gauging, protection, and authentication for 1-series, 2-series, 3-series, and 4-series cell Li-Ion and Li-Polymer battery packs, including a diagnostic lifetime data monitor and black box recorder.

8.2 Functional Block Diagram

bq40z50-R1 Block.gif

8.3 Feature Description

8.3.1 Primary (1st Level) Safety Features

The bq40z50-R1 supports a wide range of battery and system protection features that can easily be configured. See the bq40z50-R1 Technical Reference Manual (SLUUBC1) for detailed descriptions of each protection function.

The primary safety features include:

  • Cell Overvoltage Protection
  • Cell Undervoltage Protection
  • Cell Undervoltage Protection Compensated
  • Overcurrent in Charge Protection
  • Overcurrent in Discharge Protection
  • Overload in Discharge Protection
  • Short Circuit in Charge Protection
  • Short Circuit in Discharge Protection
  • Overtemperature in Charge Protection
  • Overtemperature in Discharge Protection
  • Undertemperature in Charge Protection
  • Undertemperature in Discharge Protection
  • Overtemperature FET protection
  • Precharge Timeout Protection
  • Host Watchdog Timeout Protection
  • Fast Charge Timeout Protection
  • Overcharge Protection
  • Overcharging Voltage Protection
  • Overcharging Current Protection
  • Over Precharge Current Protection

8.3.2 Secondary (2nd Level) Safety Features

The secondary safety features of the bq40z50-R1 can be used to indicate more serious faults via the FUSE pin. This pin can be used to blow an in-line fuse to permanently disable the battery pack from charging or discharging. See the bq40z50-R1 Technical Reference Manual (SLUUBC1) for detailed descriptions of each protection function.

The secondary safety features provide protection against:

  • Safety Overvoltage Permanent Failure
  • Safety Undervoltage Permanent Failure
  • Safety Overtemperature Permanent Failure
  • Safety FET Overtemperature Permanent Failure
  • Qmax Imbalance Permanent Failure
  • Impedance Imbalance Permanent Failure
  • Capacity Degradation Permanent Failure
  • Cell Balancing Permanent Failure
  • Fuse Failure Permanent Failure
  • PTC Permanent Failure
  • Voltage Imbalance at Rest Permanent Failure
  • Voltage Imbalance Active Permanent Failure
  • Charge FET Permanent Failure
  • Discharge FET Permanent Failure
  • AFE Register Permanent Failure
  • AFE Communication Permanent Failure
  • Second Level Protector Permanent Failure
  • Instruction Flash Checksum Permanent Failure
  • Open Cell Connection Permanent Failure
  • Data Flash Permanent Failure
  • Open Thermistor Permanent Failure

8.3.3 Charge Control Features

The bq40z50-R1 charge control features include:

  • Supports JEITA temperature ranges. Reports charging voltage and charging current according to the active temperature range
  • Handles more complex charging profiles. Allows for splitting the standard temperature range into two sub-ranges and allows for varying the charging current according to the cell voltage
  • Reports the appropriate charging current needed for constant current charging and the appropriate charging voltage needed for constant voltage charging to a smart charger using SMBus broadcasts
  • Reduces the charge difference of the battery cells in fully charged state of the battery pack gradually using a voltage-based cell balancing algorithm during charging. A voltage threshold can be set up for cell balancing to be active. This prevents fully charged cells from overcharging and causing excessive degradation and also increases the usable pack energy by preventing premature charge termination.
  • Supports pre-charging/zero-volt charging
  • Supports charge inhibit and charge suspend if battery pack temperature is out of temperature range
  • Reports charging fault and also indicates charge status via charge and discharge alarms

8.3.4 Gas Gauging

The bq40z50-R1 uses the Impedance Track algorithm to measure and calculate the available capacity in battery cells. The bq40z50-R1 accumulates a measure of charge and discharge currents and compensates the charge current measurement for the temperature and state-of-charge of the battery. The bq40z50-R1 estimates self-discharge of the battery and also adjusts the self-discharge estimation based on temperature. The device also has TURBO BOOST mode support, which enables the bq40z50-R1 to provide the necessary data for the MCU to determine what level of peak power consumption can be applied without causing a system reset or transient battery voltage level spike to trigger termination flags. See the bq40z50-R1 Technical Reference Manual (SLUUBC1) for further details.

8.3.5 Configuration Oscillator Function

The bq40z50-R1 fully integrates the system oscillators and does not require any external components to support this feature. System Present Operation

The bq40z50-R1 checks the PRES pin periodically (1 s). If PRES input is pulled to ground by the external system, the bq40z50-R1 detects this as system present. Emergency Shutdown

For battery maintenance, the emergency shutdown feature enables a push button action connecting the SHUTDN pin to shutdown an embedded battery pack system before removing the battery. A high-to-low transition of the SHUTDN pin signals the bq40z50-R1 to turn off both CHG and DSG FETs, disconnecting the power from the system to safely remove the battery pack. The CHG and DSG FETs can be turned on again by another high-to-low transition detected by the SHUTDN pin or when a data flash configurable timeout is reached. 1-Series, 2-Series, 3-Series, or 4-Series Cell Configuration

In a 1-series cell configuration, VC4 is shorted to VC, VC2 and VC1. In a 2-series cell configuration, VC4 is shorted to VC3 and VC2. In a 3-series cell configuration, VC4 is shorted to VC3. Cell Balancing

The device supports cell balancing by bypassing the current of each cell during charging or at rest. If the device's internal bypass is used, up to 10 mA can be bypassed and multiple cells can be bypassed at the same time. Higher cell balance current can be achieved by using an external cell balancing circuit. In external cell balancing mode, only one cell at a time can be balanced.

The cell balancing algorithm determines the amount of charge needed to be bypassed to balance the capacity of all cells.

8.3.6 Battery Parameter Measurements Charge and Discharge Counting

The bq40z50-R1 uses an integrating delta-sigma analog-to-digital converter (ADC) for current measurement, and a second delta-sigma ADC for individual cell and battery voltage and temperature measurement.

The integrating delta-sigma ADC measures the charge/discharge flow of the battery by measuring the voltage drop across a small-value sense resistor between the SRP and SRN terminals. The integrating ADC measures bipolar signals from –0.1 V to 0.1 V. The bq40z50-R1 detects charge activity when VSR = V(SRP) – V(SRN) is positive, and discharge activity when VSR = V(SRP) – V(SRN) is negative. The bq40z50-R1 continuously integrates the signal over time, using an internal counter. The fundamental rate of the counter is 0.26 nVh.

8.3.7 Battery Trip Point (BTP)

Required for WIN8 OS, the battery trip point (BTP) feature indicates when the RSOC of a battery pack has depleted to a certain value set in a DF register. This feature allows a host to program two capacity-based thresholds that govern the triggering of a BTP interrupt on the BTP_INT pin and the setting or clearing of the OperationStatus[BTP_INT] on the basis of RemainingCapacity().

An internal weak pull-up is applied when the BTP feature is active. Depending on the system design, an external pull-up may be required to put on the BTP_INT pin. See Electrical Characteristics: PRES, BTP_INT, DISP for details.

8.3.8 Lifetime Data Logging Features

The bq40z50-R1 offers lifetime data logging for several critical battery parameters. The following parameters are updated every 10 hours if a difference is detected between values in RAM and data flash:

  • Maximum and Minimum Cell Voltages
  • Maximum Delta Cell Voltage
  • Maximum Charge Current
  • Maximum Discharge Current
  • Maximum Average Discharge Current
  • Maximum Average Discharge Power
  • Maximum and Minimum Cell Temperature
  • Maximum Delta Cell Temperature
  • Maximum and Minimum Internal Sensor Temperature
  • Maximum FET Temperature
  • Number of Safety Events Occurrences and the Last Cycle of the Occurrence
  • Number of Valid Charge Termination and the Last Cycle of the Valid Charge Termination
  • Number of Qmax and Ra Updates and the Last Cycle of the Qmax and Ra Updates
  • Number of Shutdown Events
  • Cell Balancing Time for Each Cell
  • (This data is updated every 2 hours if a difference is detected.)

  • Total FW Runtime and Time Spent in Each Temperature Range
  • (This data is updated every 2 hours if a difference is detected.)

8.3.9 Authentication

The bq40z50-R1 supports authentication by the host using SHA-1.

8.3.10 LED Display

The bq40z50-R1 can drive a 3-, 4-, or 5- segment LED display for remaining capacity indication and/or a permanent fail (PF) error code indication.

8.3.11 Voltage

The bq40z50-R1 updates the individual series cell voltages at 0.25-second intervals. The internal ADC of the bq40z50-R1 measures the voltage, and scales and calibrates it appropriately. This data is also used to calculate the impedance of the cell for the Impedance Track gas gauging.

8.3.12 Current

The bq40z50-R1 uses the SRP and SRN inputs to measure and calculate the battery charge and discharge current using a 1-mΩ to 3-mΩ typ. sense resistor.

8.3.13 Temperature

The bq40z50-R1 has an internal temperature sensor and inputs for four external temperature sensors. All five temperature sensor options can be individually enabled and configured for cell or FET temperature usage. Two configurable thermistor models are provided to allow the monitoring of cell temperature in addition to FET temperature, which use a different thermistor profile.

8.3.14 Communications

The bq40z50-R1 uses SMBus v1.1 with MASTER mode and packet error checking (PEC) options per the SBS specification. SMBus On and Off State

The bq40z50-R1 detects an SMBus off state when SMBC and SMBD are low for two or more seconds. Clearing this state requires that either SMBC or SMBD transition high. The communication bus will resume activity within 1 ms. SBS Commands

See the bq40z50-R1 Technical Reference Manual (SLUUBC1) for further details.

8.4 Device Functional Modes

The bq40z50-R1 supports three power modes to reduce power consumption:

  • In NORMAL mode, the bq40z50-R1 performs measurements, calculations, protection decisions, and data updates in 250-ms intervals. Between these intervals, the bq40z50-R1 is in a reduced power stage.
  • In SLEEP mode, the bq40z50-R1 performs measurements, calculations, protection decisions, and data updates in adjustable time intervals. Between these intervals, the bq40z50-R1 is in a reduced power stage. The bq40z50-R1 has a wake function that enables exit from SLEEP mode when current flow or failure is detected.
  • In SHUTDOWN mode, the bq40z50-R1 is completely disabled.