SWRS210H January   2018  – November 2020 CC1312R

PRODUCTION DATA  

  1. Features
  2. Applications
  3. Description
  4. Functional Block Diagram
  5. Revision History
  6. Device Comparison
  7. Terminal Configuration and Functions
    1. 7.1 Pin Diagram – RGZ Package (Top View)
    2. 7.2 Signal Descriptions – RGZ Package
    3. 7.3 Connections for Unused Pins and Modules
  8. Specifications
    1. 8.1  Absolute Maximum Ratings
    2. 8.2  ESD Ratings
    3. 8.3  Recommended Operating Conditions
    4. 8.4  Power Supply and Modules
    5. 8.5  Power Consumption - Power Modes
    6. 8.6  Power Consumption - Radio Modes
    7. 8.7  Nonvolatile (Flash) Memory Characteristics
    8. 8.8  Thermal Resistance Characteristics
    9. 8.9  RF Frequency Bands
    10. 8.10 861 MHz to 1054 MHz - Receive (RX)
    11. 8.11 861 MHz to 1054 MHz - Transmit (TX) 
    12. 8.12 861 MHz to 1054 MHz - PLL Phase Noise Wideband Mode
    13. 8.13 861 MHz to 1054 MHz - PLL Phase Noise Narrowband Mode
    14. 8.14 359 MHz to 527 MHz - Receive (RX)
    15. 8.15 359 MHz to 527 MHz - Transmit (TX) 
    16. 8.16 359 MHz to 527 MHz - PLL Phase Noise
    17. 8.17 143 MHz to 176 MHz - Receive (RX)
    18. 8.18 143 MHz to 176 MHz  - Transmit (TX) 
    19. 8.19 143 MHz to 176 MHz - PLL Phase Noise
    20. 8.20 Timing and Switching Characteristics
      1. 8.20.1 Reset Timing
      2. 8.20.2 Wakeup Timing
      3. 8.20.3 Clock Specifications
        1. 8.20.3.1 48 MHz Clock Input (TCXO)
        2. 8.20.3.2 48 MHz Crystal Oscillator (XOSC_HF)
        3. 8.20.3.3 48 MHz RC Oscillator (RCOSC_HF)
        4. 8.20.3.4 2 MHz RC Oscillator (RCOSC_MF)
        5. 8.20.3.5 32.768 kHz Crystal Oscillator (XOSC_LF)
        6. 8.20.3.6 32 kHz RC Oscillator (RCOSC_LF)
      4. 8.20.4 Synchronous Serial Interface (SSI) Characteristics
        1. 8.20.4.1 Synchronous Serial Interface (SSI) Characteristics
        2.      
      5. 8.20.5 UART
        1. 8.20.5.1 UART Characteristics
    21. 8.21 Peripheral Characteristics
      1. 8.21.1 ADC
        1. 8.21.1.1 Analog-to-Digital Converter (ADC) Characteristics
      2. 8.21.2 DAC
        1. 8.21.2.1 Digital-to-Analog Converter (DAC) Characteristics
      3. 8.21.3 Temperature and Battery Monitor
        1. 8.21.3.1 Temperature Sensor
        2. 8.21.3.2 Battery Monitor
      4. 8.21.4 Comparators
        1. 8.21.4.1 Low-Power Clocked Comparator
        2. 8.21.4.2 Continuous Time Comparator
      5. 8.21.5 Current Source
        1. 8.21.5.1 Programmable Current Source
      6. 8.21.6 GPIO
        1. 8.21.6.1 GPIO DC Characteristics
    22. 8.22 Typical Characteristics
      1. 8.22.1 MCU Current
      2. 8.22.2 RX Current
      3. 8.22.3 TX Current
      4. 8.22.4 RX Performance
      5. 8.22.5 TX Performance
      6. 8.22.6 ADC Performance
  9. Detailed Description
    1. 9.1  Overview
    2. 9.2  System CPU
    3. 9.3  Radio (RF Core)
      1. 9.3.1 Proprietary Radio Formats
    4. 9.4  Memory
    5. 9.5  Sensor Controller
    6. 9.6  Cryptography
    7. 9.7  Timers
    8. 9.8  Serial Peripherals and I/O
    9. 9.9  Battery and Temperature Monitor
    10. 9.10 µDMA
    11. 9.11 Debug
    12. 9.12 Power Management
    13. 9.13 Clock Systems
    14. 9.14 Network Processor
  10. 10Application, Implementation, and Layout
    1. 10.1 Reference Designs
    2. 10.2 Junction Temperature Calculation
  11. 11Device and Documentation Support
    1. 11.1 Tools and Software
      1. 11.1.1 SimpleLink™ Microcontroller Platform
    2. 11.2 Documentation Support
    3. 11.3 Support Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information
    1. 12.1 Packaging Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • RGZ|48
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Revision History

Changes from May 19, 2020 to November 18, 2020 (from Revision G (May 2020) to Revision H (November 2020))

  • Updated the numbering format for tables, figures, and cross-references throughout the documentGo
  • Added Amazon Sidewalk to the Wireless protocols list item in Section 1, Features Go
  • Added TCXO support in Section 1, Features Go
  • Added 169 MHz band in Section 2, Applications Go
  • Changed the test condition to "Zero cycles" for the Flash sector erase time parameter in Section 8.7, Nonvolatile (Flash) Memory Characteristics Go
  • Added the 169 MHz band in Section 8.9, RF Frequency Bands Go
  • Changed the name of "802.15.4g Mandatory Mode" to "IEEE 802.15.4" and added deviation to conditions in Section 8.10, 861 MHz to 1054 MHz - Receive (RX) Go
  • Added the following sections to Section 8.10, 861 MHz to 1054 MHz - Receive (RX): 100 kbps, ±25 kHz deviation, 2-GFSK, 137 kHz RX Bandwidth; 200 kbps, ±50 kHz deviation, 2-GFSK, 311 kHz RX Bandwidth; 500 kbps, ±190 kHz deviation, 2-GFSK, 1150 kHz RX Bandwidth; OOK, 4.8 kbps; Narrowband, 9.6 kbps ±2.4 kHz deviation, 2-GFSK, 868 MHz, 17.1 kHz RX Bandwidth; 1 Mbps, ±350 kHz deviation, 2-GFSK, 2.2 MHz RX Bandwidth; Wi-SUN; WB-DSSS, 240/120/60/30 kbps (480 ksym/s, 2-GFSK, ±195 kHz Deviation, FEC (Half Rate), DSSS = 1/2/4/8, 622 kHz RX BW)Go
  • Added the Adjacent Channel Power and Alternate Channel Power parameters to Section 8.11, 861 MHz to 1054 MHz - Receive (TX) Go
  • Added the OOK 4.8 kbps section to Section 8.14, 359 MHz to 527 MHz - Receive (RX) Go
  • Added 143 MHz to 176 MHz band specifications: Section 8.17, Section 8.18, and Section 8.19 Go
  • Added Section 8.20.3.1, 48 MHz Clock Input (TCXO) Go
  • Changed the frequency of the input tone for 14-bit and 15-bit mode in Section 8.21.1.1 Go
  • Updated Figure 8-17; added Figure 8-18, Figure 8-19, and Figure 8-20 Go
  • Added the TXCO option in the paragraph that begins "The 48 MHz SCLK_HF is used as…" in Section 9.13, Clock Systems Go
  • Added the paragraph that begins "Integrated matched filter-balun devices can be used…" in Section 10.1, Reference Designs Go