SWRS258 September   2021 CC2651R3

ADVANCE INFORMATION  

  1. Features
  2. Applications
  3. Description
  4. Functional Block Diagram
  5. Revision History
  6. Device Comparison
  7. Terminal Configuration and Functions
    1. 7.1 Pin Diagram – RGZ Package (Top View)
    2. 7.2 Signal Descriptions – RGZ Package
    3. 7.3 Pin Diagram – RKP Package (Top View)
    4. 7.4 Signal Descriptions – RKP Package
    5. 7.5 Connections for Unused Pins and Modules
  8. Specifications
    1. 8.1  Absolute Maximum Ratings
    2. 8.2  ESD Ratings
    3. 8.3  Recommended Operating Conditions
    4. 8.4  Power Supply and Modules
    5. 8.5  Power Consumption - Power Modes
    6. 8.6  Power Consumption - Radio Modes
    7. 8.7  Nonvolatile (Flash) Memory Characteristics
    8. 8.8  Thermal Resistance Characteristics
    9. 8.9  RF Frequency Bands
    10. 8.10 Bluetooth Low Energy - Receive (RX)
    11. 8.11 Bluetooth Low Energy - Transmit (TX)
    12. 8.12 Zigbee - IEEE 802.15.4-2006 2.4 GHz (OQPSK DSSS1:8, 250 kbps) - RX
    13. 8.13 Zigbee - IEEE 802.15.4-2006 2.4 GHz (OQPSK DSSS1:8, 250 kbps) - TX
    14. 8.14 Timing and Switching Characteristics
      1. 8.14.1 Reset Timing
      2. 8.14.2 Wakeup Timing
      3. 8.14.3 Clock Specifications
        1. 8.14.3.1 48 MHz Crystal Oscillator (XOSC_HF)
        2. 8.14.3.2 48 MHz RC Oscillator (RCOSC_HF)
        3. 8.14.3.3 32.768 kHz Crystal Oscillator (XOSC_LF)
        4. 8.14.3.4 32 kHz RC Oscillator (RCOSC_LF)
      4. 8.14.4 Synchronous Serial Interface (SSI) Characteristics
        1. 8.14.4.1 Synchronous Serial Interface (SSI) Characteristics
        2.      
      5. 8.14.5 UART
        1. 8.14.5.1 UART Characteristics
    15. 8.15 Peripheral Characteristics
      1. 8.15.1 ADC
        1. 8.15.1.1 Analog-to-Digital Converter (ADC) Characteristics
      2. 8.15.2 DAC
        1. 8.15.2.1 Digital-to-Analog Converter (DAC) Characteristics
      3. 8.15.3 Temperature and Battery Monitor
        1. 8.15.3.1 Temperature Sensor
        2. 8.15.3.2 Battery Monitor
      4. 8.15.4 Comparators
        1. 8.15.4.1 Continuous Time Comparator
      5. 8.15.5 Current Source
        1. 8.15.5.1 Programmable Current Source
      6. 8.15.6 GPIO
        1. 8.15.6.1 GPIO DC Characteristics
    16. 8.16 Typical Characteristics
      1. 8.16.1 MCU Current
      2. 8.16.2 RX Current
      3. 8.16.3 TX Current
      4. 8.16.4 RX Performance
      5. 8.16.5 TX Performance
      6. 8.16.6 ADC Performance
  9. Detailed Description
    1. 9.1  Overview
    2. 9.2  System CPU
    3. 9.3  Radio (RF Core)
      1. 9.3.1 Bluetooth 5.2 Low Energy
      2. 9.3.2 802.15.4 (Zigbee and 6LoWPAN)
    4. 9.4  Memory
    5. 9.5  Cryptography
    6. 9.6  Timers
    7. 9.7  Serial Peripherals and I/O
    8. 9.8  Battery and Temperature Monitor
    9. 9.9  µDMA
    10. 9.10 Debug
    11. 9.11 Power Management
    12. 9.12 Clock Systems
    13. 9.13 Network Processor
  10. 10Application, Implementation, and Layout
    1. 10.1 Reference Designs
    2. 10.2 Junction Temperature Calculation
  11. 11Device and Documentation Support
    1. 11.1 Tools and Software
      1. 11.1.1 SimpleLink™ Microcontroller Platform
    2. 11.2 Documentation Support
    3. 11.3 Support Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information
    1. 12.1 Packaging Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • RGZ|48
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Analog-to-Digital Converter (ADC) Characteristics

Tc = 25 °C, VDDS = 3.0 V and voltage scaling enabled, unless otherwise noted.(1)
Performance numbers require use of offset and gain adjustements in software by TI-provided ADC drivers.
 
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Input voltage range 0 VDDS V
Resolution 12 Bits
Sample Rate 200 ksps
Offset Internal 4.3 V equivalent reference(2) –0.24 LSB
Gain error Internal 4.3 V equivalent reference(2) 7.14 LSB
DNL(4) Differential nonlinearity >–1 LSB
INL Integral nonlinearity ±4 LSB
ENOB Effective number of bits Internal 4.3 V equivalent reference(2), 200 kSamples/s,
9.6 kHz input tone
9.8 Bits
Internal 4.3 V equivalent reference(2), 200 kSamples/s,
9.6 kHz input tone, DC/DC enabled
9.8
VDDS as reference, 200 kSamples/s, 9.6 kHz input tone 10.1
Internal reference, voltage scaling disabled,
32 samples average (software), 200 kSamples/s, 300 Hz input tone
11.1
Internal reference, voltage scaling disabled,
14-bit mode, 200 kSamples/s, 300 Hz input tone (5)
11.3
Internal reference, voltage scaling disabled,
15-bit mode, 200 kSamples/s, 300 Hz input tone (5)
11.6
THD Total harmonic distortion Internal 4.3 V equivalent reference(2), 200 kSamples/s,
9.6 kHz input tone
–65 dB
VDDS as reference, 200 kSamples/s, 9.6 kHz input tone –70
Internal reference, voltage scaling disabled,
32 samples average, 200 kSamples/s, 300 Hz input tone
–72
SINAD,
SNDR
Signal-to-noise
and
distortion ratio
Internal 4.3 V equivalent reference(2), 200 kSamples/s,
9.6 kHz input tone
60 dB
VDDS as reference, 200 kSamples/s, 9.6 kHz input tone 63
Internal reference, voltage scaling disabled,
32 samples average (software), 200 kSamples/s, 300 Hz input tone
68
SFDR Spurious-free dynamic range Internal 4.3 V equivalent reference(2), 200 kSamples/s,
9.6 kHz input tone
70 dB
VDDS as reference, 200 kSamples/s, 9.6 kHz input tone 73
Internal reference, voltage scaling disabled,
32 samples average (software), 200 kSamples/s, 300 Hz input tone
75
Conversion time Serial conversion, time-to-output, 24 MHz clock 50 Clock Cycles
Current consumption Internal 4.3 V equivalent reference(2) 0.42 mA
Current consumption VDDS as reference 0.6 mA
Reference voltage Equivalent fixed internal reference (input voltage scaling enabled). For best accuracy, the ADC conversion should be initiated through the TI-RTOS API in order to include the gain/offset compensation factors stored in FCFG1 4.3(2) (3) V
Reference voltage Fixed internal reference (input voltage scaling disabled). For best accuracy, the ADC conversion should be initiated through the TI-RTOS API in order to include the gain/offset compensation factors stored in FCFG1. This value is derived from the scaled value (4.3 V) as follows:
Vref = 4.3 V × 1408 / 4095
1.48 V
Reference voltage VDDS as reference, input voltage scaling enabled VDDS V
Reference voltage VDDS as reference, input voltage scaling disabled VDDS / 2.82(3) V
Input impedance 200 kSamples/s, voltage scaling enabled. Capacitive input, Input impedance depends on sampling frequency and sampling time >1
Using IEEE Std 1241-2010 for terminology and test methods
Input signal scaled down internally before conversion, as if voltage range was 0 to 4.3 V
Applied voltage must be within Absolute Maximum Ratings at all times
No missing codes
ADC_output = Σ(4n samples ) >> n, n = desired extra bits