SWRS278B february   2022  – august 2023 CC2651R3SIPA

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Functional Block Diagram
  6. Revision History
  7. Device Comparison
  8. Terminal Configuration and Functions
    1. 7.1 Pin Diagram
    2. 7.2 Signal Descriptions – SIPA Package
    3. 7.3 Connections for Unused Pins and Modules
  9. Specifications
    1. 8.1  Absolute Maximum Ratings
    2. 8.2  ESD Ratings
    3. 8.3  Recommended Operating Conditions
    4. 8.4  Power Supply and Modules
    5. 8.5  Power Consumption - Power Modes
    6. 8.6  Power Consumption - Radio Modes
    7. 8.7  Nonvolatile (Flash) Memory Characteristics
    8. 8.8  Thermal Resistance Characteristics
    9. 8.9  RF Frequency Bands
    10. 8.10 Antenna Characteristics
    11. 8.11 Bluetooth Low Energy - Receive (RX)
    12. 8.12 Bluetooth Low Energy - Transmit (TX)
    13. 8.13 Zigbee - IEEE 802.15.4-2006 2.4 GHz (OQPSK DSSS1:8, 250 kbps) - RX
    14. 8.14 Zigbee - IEEE 802.15.4-2006 2.4 GHz (OQPSK DSSS1:8, 250 kbps) - TX
    15. 8.15 Timing and Switching Characteristics
      1. 8.15.1 Reset Timing
      2. 8.15.2 Wakeup Timing
      3. 8.15.3 Clock Specifications
        1. 8.15.3.1 48 MHz Crystal Oscillator (XOSC_HF)
        2. 8.15.3.2 48 MHz RC Oscillator (RCOSC_HF)
        3. 8.15.3.3 32.768 kHz Crystal Oscillator (XOSC_LF)
        4. 8.15.3.4 32 kHz RC Oscillator (RCOSC_LF)
      4. 8.15.4 Synchronous Serial Interface (SSI) Characteristics
        1. 8.15.4.1 Synchronous Serial Interface (SSI) Characteristics
        2.       37
      5. 8.15.5 UART
        1. 8.15.5.1 UART Characteristics
    16. 8.16 Peripheral Characteristics
      1. 8.16.1 ADC
        1. 8.16.1.1 Analog-to-Digital Converter (ADC) Characteristics
      2. 8.16.2 DAC
        1. 8.16.2.1 Digital-to-Analog Converter (DAC) Characteristics
      3. 8.16.3 Temperature and Battery Monitor
        1. 8.16.3.1 Temperature Sensor
        2. 8.16.3.2 Battery Monitor
      4. 8.16.4 Comparators
        1. 8.16.4.1 Continuous Time Comparator
      5. 8.16.5 Current Source
        1. 8.16.5.1 Programmable Current Source
      6. 8.16.6 GPIO
        1. 8.16.6.1 GPIO DC Characteristics
    17. 8.17 Typical Characteristics
      1. 8.17.1 MCU Current
      2. 8.17.2 RX Current
      3. 8.17.3 TX Current
      4. 8.17.4 RX Performance
      5. 8.17.5 TX Performance
      6. 8.17.6 ADC Performance
  10. Detailed Description
    1. 9.1  Overview
    2. 9.2  System CPU
    3. 9.3  Radio (RF Core)
      1. 9.3.1 Bluetooth 5.2 Low Energy
      2. 9.3.2 802.15.4 (Zigbee)
    4. 9.4  Memory
    5. 9.5  Cryptography
    6. 9.6  Timers
    7. 9.7  Serial Peripherals and I/O
    8. 9.8  Battery and Temperature Monitor
    9. 9.9  µDMA
    10. 9.10 Debug
    11. 9.11 Power Management
    12. 9.12 Clock Systems
    13. 9.13 Network Processor
    14. 9.14 Device Certification and Qualification
      1. 9.14.1 FCC Certification and Statement
      2. 9.14.2 IC/ISED Certification and Statement
      3. 9.14.3 ETSI/CE Certification
      4. 9.14.4 UK Certification
      5. 9.14.5 MIC Certification
      6. 9.14.6 Korea Certification
      7. 9.14.7 NCC Certification and Statement
    15. 9.15 Module Markings
    16. 9.16 End Product Labeling
    17. 9.17 Manual Information to the End User
  11. 10Application, Implementation, and Layout
    1. 10.1 Typical Application Circuit
    2. 10.2 Alternate Application Circuit
    3. 10.3 Device Connections
      1. 10.3.1 Reset
      2. 10.3.2 Unused Pins
    4. 10.4 PCB Layout Guidelines
      1. 10.4.1 General Layout Recommendations
      2. 10.4.2 Typical RF Layout Recommendations with Integrated Antenna
      3. 10.4.3 RF Layout Recommendations with External Antenna
        1. 10.4.3.1 External Antenna Placement and Routing
        2. 10.4.3.2 Transmission Line Considerations
      4. 10.4.4 Alternate PCB Layout Guidelines
    5. 10.5 Reference Designs
    6. 10.6 Junction Temperature Calculation
  12. 11Environmental Requirements and SMT Specifications
    1. 11.1 PCB Bending
    2. 11.2 Handling Environment
      1. 11.2.1 Terminals
      2. 11.2.2 Falling
    3. 11.3 Storage Condition
      1. 11.3.1 Moisture Barrier Bag Before Opened
      2. 11.3.2 Moisture Barrier Bag Open
    4. 11.4 PCB Assembly Guide
      1. 11.4.1 PCB Land Pattern & Thermal Vias
      2. 11.4.2 SMT Assembly Recommendations
      3. 11.4.3 PCB Surface Finish Requirements
      4. 11.4.4 Solder Stencil
      5. 11.4.5 Package Placement
      6. 11.4.6 Solder Joint Inspection
      7. 11.4.7 Rework and Replacement
      8. 11.4.8 Solder Joint Voiding
    5. 11.5 Baking Conditions
    6. 11.6 Soldering and Reflow Condition
  13. 12Device and Documentation Support
    1. 12.1 Device Nomenclature
    2. 12.2 Tools and Software
      1. 12.2.1 SimpleLink™ Microcontroller Platform
    3. 12.3 Documentation Support
    4. 12.4 Support Resources
    5. 12.5 Trademarks
    6. 12.6 Electrostatic Discharge Caution
    7. 12.7 Glossary
  14. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

System CPU

The CC2651R3SIPA SimpleLink Wireless MCU contains an Arm® Cortex®-M4 system CPU, which runs the application and the higher layers of radio protocol stacks.

The system CPU is the foundation of a high-performance, low-cost platform that meets the system requirements of minimal memory implementation, and low-power consumption, while delivering outstanding computational performance and exceptional system response to interrupts.

Its features include the following:

  • ARMv7-M architecture optimized for small-footprint embedded applications
  • Arm Thumb®-2 mixed 16- and 32-bit instruction set delivers the high performance expected of a 32-bit Arm core in a compact memory size
  • Fast code execution permits increased sleep mode time
  • Deterministic, high-performance interrupt handling for time-critical applications
  • Single-cycle multiply instruction and hardware divide
  • Hardware division and fast digital-signal-processing oriented multiply accumulate
  • Saturating arithmetic for signal processing
  • Full debug with data matching for watchpoint generation
    • Data Watchpoint and Trace Unit (DWT)
    • JTAG Debug Access Port (DAP)
    • Flash Patch and Breakpoint Unit (FPB)
  • Trace support reduces the number of pins required for debugging and tracing
    • Instrumentation Trace Macrocell Unit (ITM)
    • Trace Port Interface Unit (TPIU) with asynchronous serial wire output (SWO)
  • Optimized for single-cycle flash memory access
  • Tightly connected to 8-KB 4-way random replacement cache for minimal active power consumption and wait states
  • Ultra-low-power consumption with integrated sleep modes
  • 48 MHz operation
  • 1.25 DMIPS per MHz