SCHS463 May   2025 CD3268A , CD3269A

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Timing Requirements
  7. 6 Parameter Measurement Information
    1. 6.1 eN-MIC Microphone Integrated Noise Measurement
    2. 6.2 Current Measurements
    3. 6.3 MICPWR Output Voltage Measurement
    4. 6.4 Tone Mode Threshold Measurements
    5. 6.5 Impedance Measurements
    6. 6.6 Tone Mode Output Measurements
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Tone Mode Start-up Timing
      2. 7.3.2 Authentication
      3. 7.3.3 Shunt Regulator
      4. 7.3.4 Power-on-reset
    4. 7.4 Device Functional Modes
      1. 7.4.1 Button Mode
      2. 7.4.2 Tone Mode
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Third-Party Products Disclaimer
      2. 9.1.2 Development Support
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.3.1 Tone Mode Start-up Timing

CD3268A CD3269A Tone Mode Start-up TimingFigure 7-2 Tone Mode Start-up Timing

The tone mode start-up sequence is as follows:

  1. After detecting VMIC > 2.35V, the switch connecting the MIC and REM pins together (Switch B) is opened after time tOFFB.
  2. After a delay of tONA after VMIC > 2.35V, the VSHUNT and MICPWR pins are shorted (with Switch A). The microphone is enabled by turning on the FET switch that is controlled by the MICPWR pin.
  3. After a delay to allow the switches to settle, tM2T after VMIC > 2.35V, the CD326x sends a preset acknowledge (ACK) tone sequence.
  4. The specially enabled audio interface detects the ACK sequence and authenticates the presence of the CD326x.