SCHS047O August   1998  – May 2026 CD4051B , CD4052B , CD4053B

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 AC Performance Characteristics
    7. 5.7 Typical Characteristics
  7. 6 Parameter Measurement Information
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagrams
    3. 7.3 Feature Description
    4. 7.4 Device Functional Modes
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curve
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

4 Pin Configuration and Functions

CD4051B CD4052B CD4053B CD4051B E, M, NS, and PW Package,16-Pin PDIP, CDIP, SOIC, SOP, and TSSOP(Top View)Figure 4-1 CD4051B E, M, NS, and PW Package,16-Pin PDIP, CDIP, SOIC, SOP, and TSSOP(Top View)
CD4051B CD4052B CD4053B CD4052B E, M, NS, and PW Package,16-Pin PDIP, CDIP, SOIC, SOP, and TSSOP(Top View)Figure 4-2 CD4052B E, M, NS, and PW Package,16-Pin PDIP, CDIP, SOIC, SOP, and TSSOP(Top View)
CD4051B CD4052B CD4053B CD4053B E, M, NS, and PW Package,16-Pin PDIP, CDIP, SOIC, SOP, and TSSOP (Top View)Figure 4-3 CD4053B E, M, NS, and PW Package,16-Pin PDIP, CDIP, SOIC, SOP, and TSSOP (Top View)
Table 4-1 Pin Functions CD4051B
PINTYPE(1)DESCRIPTION
NO.NAME
1CH 4 IN/OUTI/OChannel 4 in/out
2CH 6 IN/OUTI/OChannel 6 in/out
3COM OUT/INI/OCommon out/in
4CH 7 IN/OUTI/OChannel 7 in/out
5CH 5 IN/OUTI/OChannel 5 in/out
6INHIDisables all channels. See Table 7-1.
7VEE—Negative power input
8VSS—Ground
9CIChannel select C. See Table 7-1.
10BIChannel select B. See Table 7-1.
11AIChannel select A. See Table 7-1.
12CH 3 IN/OUTI/OChannel 3 in/out
13CH 0 IN/OUTI/OChannel 0 in/out
14CH 1 IN/OUTI/OChannel 1 in/out
15CH 2 IN/OUTI/OChannel 2 in/out
16VDD—Positive power input
(1) I = input, O = output
Table 4-2 Pin Functions CD4052B
PINTYPE(1)DESCRIPTION
NO.NAME
1Y CH 0 IN/OUTI/OChannel Y0 in/out
2Y CH 2 IN/OUTI/OChannel Y2 in/out
3Y COM OUT/INI/OY common out/in
4Y CH 3 IN/OUTI/OChannel Y3 in/out
5Y CH 1 IN/OUTI/OChannel Y1 in/out
6INHIDisables all channels. See Table 7-1.
7VEE—Negative power input
8VSS—Ground
9BIChannel select B. See Table 7-1.
10AIChannel select A. See Table 7-1.
11X CH 3 IN/OUTI/OChannel X3 in/out
12X CH 0 IN/OUTI/OChannel X0 in/out
13X COM IN/OUTI/OX common out/in
14X CH 1 IN/OUTI/OChannel in/out
15X CH 2 IN/OUTI/OChannel in/out
16VDD—Positive power input
(1) I = input, O = output
Table 4-3 Pin Functions CD4053B
PINTYPE(1)DESCRIPTION
NO.NAME
1BY IN/OUTI/OB channel Y in/out
2BX IN/OUTI/OB channel X in/out
3CY IN/OUTI/OC channel Y in/out
4CX OR CY OUT/INI/OC common out/in
5CX IN/OUTI/OC channel X in/out
6INHIDisables all channels. See Table 7-1.
7VEE—Negative power input
8VSS—Ground
9CIChannel select C. See Table 7-1.
10BIChannel select B. See Table 7-1.
11AIChannel select A. See Table 7-1.
12AX IN/OUTI/OA channel X in/out
13AY IN/OUTI/OA channel Y in/out
14AX OR AY OUT/INI/OA common out/in
15BX OR BY OUT/INI/OB common out/in
16VDD—Positive power input
(1) I = input, O = output