SCLS464A September   2002  – January 2015 CD74HC4051-EP

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration And Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Analog Channel Characteristics
    7. 6.7 Switching Characteristics
    8. 6.8 Typical Characteristics
      1. 6.8.1 Recommended Operating Area as a Function of Supply Voltages
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 TTL-to-HC Interface
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device And Documentation Support
    1. 12.1 Trademarks
    2. 12.2 Electrostatic Discharge Caution
    3. 12.3 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • D|16
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8 Detailed Description

8.1 Overview

The CD74HC4051-EP is a digitally controlled analog switch that uses silicon gate CMOS technology to achieve operating speeds similar to LSTTL, with the low-power consumption of standard CMOS integrated circuits.

8.2 Functional Block Diagram

logic_diagram_positive_scls464.gif

8.3 Feature Description

This analog multiplexer and demultiplexer controls analog voltages that may vary across the voltage supply range (that is, VCC to VEE). These bidirectional switches allow the use of any analog input as an output and vice versa. The switches have low ON-resistance and low OFF leakages. In addition, the device has an enable control (E) that, when high, disables all switches to their OFF state.

8.4 Device Functional Modes

Table 1. Function Table

INPUTS ON CHANNEL
(S)
E S2 S1 S0
L
L
L
L
L
L
L
L
H		 L
L
L
L
H
H
H
H
X		 L
L
H
H
L
L
H
H
X		 L
H
L
H
L
H
L
H
X		 A0
A1
A2
A3
A4
A5
A6
A7
None
logic_diagram_scls464.gifFigure 10. Logic Diagram (Positive Logic)