SNAS935B March   2025  – November 2025 CDC6C-Q1

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Device Comparison
  6. Pin Configuration and Functions
  7. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Environmental Compliance
    4. 6.4 Recommended Operating Conditions
    5. 6.5 Thermal Information
    6. 6.6 Electrical Characteristics
    7. 6.7 Timing Diagrams
    8. 6.8 Typical Characteristics
  8. Parameter Measurement Information
    1. 7.1 Device Output Configurations
  9. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  Bulk Acoustic Wave (BAW)
      2. 8.3.2  Device Block-Level Description
      3. 8.3.3  Function Pin
      4. 8.3.4  Clock Output Interfacing and Termination
      5. 8.3.5  CDC6Cx-Q1 CISPR25 Radiated Emission Performance
        1. 8.3.5.1 EMI Reduction and Slow Mode Options
      6. 8.3.6  Temperature Stability
      7. 8.3.7  Frequency Aging
      8. 8.3.8  Mechanical Robustness
      9. 8.3.9  Wettable Flanks
      10. 8.3.10 Device Functional Modes
  10. Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Driving Multiple Loads With a Single CDC6Cx-Q1
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
        1. 9.4.1.1 Providing Thermal Reliability
        2. 9.4.1.2 Recommended Solder Reflow Profile
      2. 9.4.2 Layout Examples
  11. 10Device and Documentation Support
    1. 10.1 Documentation Support
      1. 10.1.1 Related Documentation
    2. 10.2 Receiving Notification of Documentation Updates
    3. 10.3 Support Resources
    4. 10.4 Trademarks
    5. 10.5 Electrostatic Discharge Caution
    6. 10.6 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information
    1. 12.1 Orderable Part Number Decoder

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Providing Thermal Reliability

The CDC6Cx-Q1 is a low power, high performance device. Therefore, pay careful attention to device configuration and printed circuit board (PCB) layout with respect to power consumption. The ground pin must be connected to the ground plane of the PCB through three vias or more to maximize thermal dissipation out of the package.

The equation below describes the relationship between the PCB temperature around the CDC6Cx-Q1 and the junction temperature.

Equation 1. TB = TJ – ΨJB × P

where

  • TB: PCB temperature around the CDC6Cx-Q1
  • TJ: Junction temperature of CDC6Cx-Q1
  • ΨJB: Junction-to-board thermal resistance parameter of CDC6Cx-Q1 (refer to the Thermal Information tables in the Specifications section for this information)
  • P: On-chip power dissipation of CDC6Cx-Q1