7.6.1.9 SBIMSK1 Register (Address = 8h) [reset = 0h]
SBIMSK1 is shown in Table 19.
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The SBIMSK1 register allows the SMBus to force enable each output channel individually when the CDCDB2000 is in Side-Band interface mode.
Table 19. SBIMSK1 Register Field Descriptions
Bit |
Field |
Type |
Reset |
Description |
7 |
SBI Output Mask, CK7 |
R/W |
0h |
This bit overrides the the SBI output disable when set.
0h = SBI Controls Output
1h = Output CK7 Enabled
|
6 |
SBI Output Mask, CK6 |
R/W |
0h |
This bit overrides the the SBI output disable when set.
0h = SBI Controls Output
1h = Output CK6 Enabled
|
5 |
SBI Output Mask, CK5 |
R/W |
0h |
This bit overrides the the SBI output disable when set.
0h = SBI Controls Output
1h = Output CK5 Enabled
|
4 |
SBI Output Mask, CK4 |
R/W |
0h |
This bit overrides the the SBI output disable when set.
0h = SBI Controls Output
1h = Output CK4 Enabled
|
3 |
SBI Output Mask, CK3 |
R/W |
0h |
This bit overrides the the SBI output disable when set.
0h = SBI Controls Output
1h = Output CK3 Enabled
|
2 |
SBI Output Mask, CK2 |
R/W |
0h |
This bit overrides the the SBI output disable when set.
0h = SBI Controls Output
1h = Output CK2 Enabled
|
1 |
SBI Output Mask, CK1 |
R/W |
0h |
This bit overrides the the SBI output disable when set.
0h = SBI Controls Output
1h = Output CK1 Enabled
|
0 |
SBI Output Mask, CK0 |
R/W |
0h |
This bit overrides the the SBI output disable when set.
0h = SBI Controls Output
1h = Output CK0 Enabled
|