During power-up, VDD and VDDI must always start and settle before VOFFSET, VBIAS, and VRESET voltages are applied to the DMD.
During power-up, it is a strict requirement that the delta between VBIAS and VOFFSET must be within the specified limit shown in Section 6.4. Refer to Figure 9-2 for power-up delay requirements.
During power-up, the DMD’s LPSDR input pins shall not be driven high until after VDD and VDDI have settled at operating voltage.
During power-up, there is no requirement for the relative timing of VRESET with respect to VOFFSET and VBIAS. Power supply slew rates during power-up are flexible, provided that the transient voltage levels follow the requirements listed previously and in Figure 9-1.