SNLS484H February 2015 – June 2024 DP83867CR , DP83867IR
PRODUCTION DATA
Refer to the PDF data sheet for device specific package drawings
BIT | BIT NAME | DEFAULT | DESCRIPTION |
---|---|---|---|
15:10 | OUI_LSB | 1010 00, RO/P | OUI Least Significant Bits: Bits 19 to 24 of the OUI (080028h) are mapped from bits 15 to 10 of this register respectively. |
9:4 | VNDR_MDL | 10 0011, RO/P | Vendor Model Number: The six bits of vendor model number are mapped from bits 9 to 4 (most significant bit to bit 9). |
3:0 | MDL_REV | 0001, RO/P | Model Revision Number: Four bits of the vendor model revision number are mapped from bits 3 to 0 (most significant bit to bit 3). This field will be incremented for all major device changes. |