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Product details

Parameters

Datarate (Mbps) 10/100/1000 Interface type GMII, RGMII, MII Number of ports Single Rating Catalog Features Cable diagnostics, IEEE 1588 SOF, JTAG1149.1 Supply voltage (V) 1 and 2.5 IO supply (Typ) (V) 1.8, 2.5, 3.3 Operating temperature range (C) -40 to 85 Cable length (m) 130 open-in-new Find other Ethernet PHYs

Package | Pins | Size

HTQFP (PAP) 64 144 mm² 12 x 12 VQFN (RGZ) 48 49 mm² 7 x 7 open-in-new Find other Ethernet PHYs

Features

  • Ultra low RGMII latency TX < 90ns, RX < 290ns
  • Time Sensitive Network (TSN) compliant
  • Low power consumption 457 mW
  • Exceeds 8000 V IEC 61000-4-2 ESD protection
  • Meets EN55011 class B emission standards
  • 16 programmable RGMII delay modes on RX/TX
  • Integrated MDI termination resistors
  • Programmable MII/GMII/RGMII termination impedance
  • WoL (Wake-on-LAN) packet detection
  • 25-MHz or 125-MHz synchronized clock output
  • IEEE 1588 time stamp support
  • RJ45 mirror mode
  • Fully compatible to IEEE 802.3 10BASE-Te, 100BASE-TX, and 1000BASE-T Specification
  • Cable diagnostics
  • MII, GMII and RGMII MAC interface options
  • Configurable I/O voltage (3.3 V, 2.5 V, 1.8 V)
  • Fast link drop mode
  • JTAG support

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Description

The DP83867 device is a robust, low power, fully featured Physical Layer transceiver with integrated PMD sublayers to support 10BASE-Te, 100BASE-TX and 1000BASE-T Ethernet protocols. Optimized for ESD protection, the DP83867 exceeds 8-kV IEC 61000-4-2 (direct contact).

The DP83867 is designed for easy implementation of 10/100/1000 Mbps Ethernet LANs. It interfaces directly to twisted pair media via an external transformer. This device interfaces directly to the MAC layer through the IEEE 802.3 Standard Media Independent Interface (MII), the IEEE 802.3 Gigabit Media Independent Interface (GMII) or Reduced GMII (RGMII). The QFP package supports MII/GMII/RGMII whereas the QFN package supports RGMII.

The DP83867 provides precision clock synchronization, including a synchronous Ethernet clock output. It has low latency and provides IEEE 1588 Start of Frame Detection.

The DP83867 consumes only 490mW (PAP) and 457mW (RGZ) under full operating power. Wake on LAN can be used to lower system power consumption.

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Technical documentation

= Top documentation for this product selected by TI
No results found. Please clear your search and try again. View all 20
Type Title Date
* Datasheet DP83867IR/CR Robust, High Immunity 10/100/1000 Ethernet Physical Layer Transceiver datasheet (Rev. F) Oct. 17, 2019
White papers Ein Techniker-Leitfaden für Industrieroboter-Designs Mar. 25, 2020
White papers E-book: An engineer’s guide to industrial robot designs Feb. 12, 2020
Technical articles Top 3 considerations for harsh industrial Ethernet Nov. 04, 2019
Application notes 88E1512 to DP83867 and DP83869 System Rollover Aug. 30, 2019
Application notes AR8031 to DP83867 and DP83869 System Rollover Aug. 30, 2019
Technical articles Overcoming Ethernet connectivity challenges on the power grid Jun. 27, 2019
Application notes Importance of Latency in Factory Automation (Rev. A) Feb. 06, 2019
Application notes Selection and specification of crystals for Texas Instruments ethernet physical Feb. 06, 2019
Application notes How to Configure DP838XX for Ethernet Compliance and Loopback Testing (Rev. A) Jan. 31, 2017
Technical articles Two ways to save power with low-power Ethernet Nov. 17, 2016
Application notes KSZ9031RN to DP83867CR/CS/E/IR/IS System Rollover Sep. 12, 2016
Application notes DP83867 Troubleshooting Guide (Rev. A) Apr. 06, 2016
User guides USB-2-MDIO User's Guide Feb. 19, 2016
Application notes RGMII Interface Timing Budgets Oct. 28, 2015
Application notes How to Configure DP83867 Start of Frame Oct. 27, 2015
Application notes DP83867E/IS/CS/IR/CR RGZ Power Consumption Data Oct. 07, 2015
Application notes DP83867IRPAP Power Consumption Data Aug. 27, 2015
User guides DP83867EVM Users'Guide Mar. 14, 2015
Application notes AN-1469 PHYTER® Design & Layout Guide (Rev. D) Apr. 26, 2013

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Hardware development

EVALUATION BOARDS Download
document-generic User guide
499
Description

The DCA1000 evaluation module (EVM) provides real-time data capture and streaming for two- and four-lane low-voltage differential signaling (LVDS) traffic from TI radar-sensor BoosterPack™ EVMs. The data can be streamed out via 1-Gbps Ethernet in real time. The data (...)

Features
  • Supports lab and mobile collection scenarios
  • Captures LVDS data from AWR/IWR radar sensors
  • Streams output in real time through 1-Gbps Ethernet
  • Controlled via onboard switches or GUI/library
EVALUATION BOARDS Download
document-generic User guide
199
Description

The DP83867ERGZ-R-EVM supports 1000/100/10BASE and is compliant with the IEEE 802.3 standard. This reference design supports the RGMII MAC interface.

The DP83867ERGZ-R-EVM evaluation module (EVM) for the DP83867 device includes 3 on-board status LEDs and 5-V connectors with onboard (...)

Features
  • 1000BASE-Tx IEEE 802.3 compliant
  • Meets EN55011 3m Class B emissions and immunity requirements
  • SFD IEEE 1588 timestamp
  • Wake-on LAN
  • Low power modes: Active sleep, passive sleep, IEEE power down and deep power down
EVALUATION BOARDS Download
document-generic User guide
199
Description

The DP83867IRPAP-EVM supports 1000/100/10BASE and is compliant with the IEEE 802.3 standard. This reference design supports GMII, RGMII and MII MAC interfaces.

The DP83867IRPAP-EVM incudes four onboard status LEDs and a 5-V jack with onboard LDO regulators. The EVM is JTAG accessible and (...)

Features
  • 1000BASE-TX IEEE 802.3 compliant
  • GMII, RGMII & MII MAC interfaces
  • SFD IEEE 1588 timestamp
  • Low-power modes: Active sleep, passive sleep, IEEE power down and deep power down
  • Wake-on-LAN
  • Energy-efficient Ethernet
  • Support error free data transfer over 125 m on CAT5 cable
EVALUATION BOARDS Download
1146.54
Description
J6Entry, RSP and TDA2E-17 CPU Board EVM is an evaluation platform designed to speed up development efforts and reduce time to market for Infotainment  reconfigurable Digital Cluster or Integrated Digital Cockpit and ADAS applications. The CPU board integrates key peripherals such as parallel (...)
Features
  • 2GB DDR3L
  • LP8733/LP8732 Power Solution
  • On-board eMMC, NAND, NOR
  • USB3, USB2, PCIe, Ethernet, COM8Q, CAN, MLB, MicroSD and HDMI connectors
EVALUATION BOARDS Download
2324.44
Description

The J6Entry/RSP EVM is an evaluation platform designed to speed up development efforts and reduce time to market for applications such as Infotainment, reconfigurable Digital Cluster or Integrated Digital Cockpit.

The main CPU board integrates these key peripherals such as Ethernet or HDMI, while the (...)

Features
  • 10.1" Display with capacitive Touch
  • JAMR3 Radio Tuner Application Board
  • 2GB DDR3L
  • LP8733/LP8732 Power Solution
  • On-board eMMC, NAND, NOR
  • USB3, USB2, PCIe, Ethernet, COM8Q, CAN, MLB, MicroSD and HDMI connectors
DEVELOPMENT KITS Download
document-generic User guide
399
Description
The K2G Industrial Communications Engine (ICE) enables 66AK2Gx processor developers to immediately start development, demonstration and test of industrial communication protocols for products such as PLC, bus controllers, motion control and other real-time industrial networked applications.  (...)
Features
  • 66AK2G02 C66x DSP + ARM Cortex A15 Processor at 600 MHz
  • Two programmable real-time unit (PRU) and industrial communication subsystems (PRU-ICSS)
  • PCI express 2.0 with integrated PHY
  • Gigabit ethernet port supporting 10/100/1000 Mbps data rate on RJ45 connector
  • Four 10x100 industrial ethernet connectors
  • (...)

Software development

APPLICATION SOFTWARE & FRAMEWORKS Download
USB to MDIO serial management tool
USB-2-MDIO The USB-2-MDIO software tool lets Texas Instruments' Ethernet PHYs access the MDIO status and device control registers.  The USB-2-MDIO tool includes a LaunchPad™ Development kit for TI's MSP430™ MCUs that is interfaced with a lightweight (...)
Features
  • MDIO bus controller
  • IEEE 802.3 clause 22
  • IEEE 802.3ah clause 22 access to clause 45 registers
DRIVERS & LIBRARIES Download
Ethernet PHY Linux drivers & tools
ETHERNET-SW The Linux drivers for Texas Instruments' Ethernet physical layer (PHY) transceivers support communication through the serial management interface (MDC/MDIO) to configure and read PHY registers.

The USB-2-MDIO software lets you directly access the registers during debug and prototyping.  (...)

Design tools & simulation

SIMULATION MODELS Download
SNLM191A.ZIP (80 KB) - IBIS Model
SIMULATION MODELS Download
SNLM192A.ZIP (5 KB) - BSDL Model
SIMULATION MODELS Download
SNLM201A.ZIP (5 KB) - BSDL Model
SIMULATION TOOLS Download
PSpice® for TI design and simulation tool
PSPICE-FOR-TI — PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Features
  • Leverages Cadence PSpice Technology
  • Preinstalled library with a suite of digital models to enable worst-case timing analysis
  • Dynamic updates ensure you have access to most current device models
  • Optimized for simulation speed without loss of accuracy
  • Supports simultaneous analysis of multiple products
  • (...)
SIMULATION TOOLS Download
SPICE-based analog simulation program
TINA-TI TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
document-generic User guide

Reference designs

REFERENCE DESIGNS Download
Cascade imaging radar capture reference design using Jacinto™ ADAS processor
TIDEP-01017 The cascade development kit has two main use cases:
  1. To use the MMWCAS-DSP-EVM as a capture card to fully evaluate the AWR2243 four-chip cascade performance by using the mmWave studio tool, please read the TIDEP-01012 design guide.
  2. To use the MMWCAS-DSP-EVM to develop radar real time SW application (...)
document-generic Schematic document-generic User guide
REFERENCE DESIGNS Download
High density isolated PoE and GigE reference design for machine vision cameras and vision sensors
TIDA-010083 — Power over Ethernet (PoE) offers an easy and reliable solution to combine power and data in one cable with high data rate and long reach. This combination makes PoE ideal for small devices such as machine vision cameras and vision sensors. This reference design implements a complete PoE powered (...)
document-generic Schematic document-generic User guide
REFERENCE DESIGNS Download
Industrial gigabit Ethernet PHY reference design
TIDA-010010 — PLC applications require high speed gigabit Ethernet interface. This can be realized using our reference design which implements the DP83867IR industrial gigabit Ethernet physical layer transceiver to the gigabit Ethernet MAC peripheral block inside the Sitara™ AM5728 processor.
document-generic Schematic document-generic User guide
REFERENCE DESIGNS Download
EMI/EMC Compliant Industrial Temp Dual Port Gigabit Ethernet PHY Reference Design
TIDA-00204 This design allows for performance evaluation of two industrial grade DP83867IR Gigabit Ethernet PHYs and Sitara™ host processors with integrated Ethernet MAC and Switch. It was developed to meet industrial requirements for EMI and EMC. The application firmware implements a driver for the PHY (...)
document-generic Schematic document-generic User guide

CAD/CAE symbols

Package Pins Download
HTQFP (PAP) 64 View options
VQFN (RGZ) 48 View options

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