The DP83867 device is a robust, low power, fully featured Physical Layer transceiver with integrated PMD sublayers to support 10BASE-Te, 100BASE-TX and 1000BASE-T Ethernet protocols. Optimized for ESD protection, the DP83867 exceeds 8kV IEC 61000-4-2 (direct contact).
The DP83867 is designed for easy implementation of 10/100/1000Mbps Ethernet LANs. DP83867 interfaces directly to twisted pair media via an external transformer. This device interfaces directly to the MAC layer through the IEEE 802.3 Standard Media Independent Interface (MII), the IEEE 802.3 Gigabit Media Independent Interface (GMII) or Reduced GMII (RGMII). The QFP package supports MII/GMII/RGMII whereas the QFN package supports RGMII.
The DP83867 provides precision clock synchronization, including a synchronous Ethernet clock output. DP83867 has low latency and provides IEEE 1588 Start of Frame Detection.
The DP83867 consumes only 490mW (PAP) and 457mW (RGZ) under full operating power. Wake on LAN can be used to lower system power consumption.
For additional terms or required resources, click any title below to view the detail page where available.
The DP83867ERGZ-R-EVM supports 1000/100/10BASE and is compliant with the IEEE 802.3 standard. This reference design supports the RGMII MAC interface.
The DP83867ERGZ-R-EVM evaluation module (EVM) for the DP83867 device includes 3 on-board status LEDs and 5-V connectors with (...)
BeagleY® AI is an open-source single board computer designed to simplify the process of building smart human machine interfaces (HMI), adding cameras and high-speed connectivity to a reliable embedded system. It features a powerful 64-bit, quad-core A53 processor, multiple powerful AI accelerators (...)
The ASPEED Ethernet PHY EVM is a daughter card intended to connect to ASPEED’s AST2600 evaluation board (EVB) to show how the DP83867 and DP83869 Ethernet PHYs can be used in a board management controller (BMC) system. The EVM contains four PHYs each capable of 10/100/1000Mbps data rate.
The drivers for Texas Instruments' Ethernet physical layer (PHY) transceivers support communication through the serial management interface (MDC/MDIO) to configure and read PHY registers. Linux and RTOS drivers can be found on our github.
The USB-2-MDIO software tool lets Texas Instruments' Ethernet PHYs access the MDIO status and device control registers. The USB-2-MDIO tool includes a LaunchPad™ Development kit for TI's MSP430™ MCUs that is interfaced with a lightweight GUI. The (...)
This design allows for performance evaluation of two industrial grade DP83867IR Gigabit Ethernet PHYs and Sitara™ host processors with integrated Ethernet MAC and Switch. It was developed to meet industrial requirements for EMI and EMC. The application firmware implements a driver for the (...)
TIDA-050034 is a fully functional development board combining a TI PMIC, TPS65218DO, with NXP i.MX 7Dual Application Processor.
The hardware design consists of DDR3L SDRAM (2x512MB), 64MB Serial NOR Flash, 8GB eMMC 5.0 iNAND, SD Card interface v3.0, 50 pin LCD Connector for external TFT display (...)
The multi-sensor platform reference design for Advanced Driver Assistance Systems (ADAS) from D3 Engineering provides qualified developers with a fully functioning evaluation platform for testing and development of ADAS applications, for use primarily in the automotive industry. D3 also (...)
| Package | Pins | CAD symbols, footprints & 3D models |
|---|---|---|
| VQFN (RGZ) | 48 | Ultra Librarian |
Recommended products may have parameters, evaluation modules or reference designs related to this TI product.
Content is provided "as is" by TI and community contributors and does not constitute TI specifications. See terms of use.
If you have questions about quality, packaging or ordering TI products, see TI support.