SLVSD14A June 2017 – June 2020 DRV10983-Q1
The DRV10983-Q1 device provides several options for determining if the motor becomes locked as a result of some external torque. Five lock-detect schemes work together to ensure the lock condition is detected quickly and reliably. Figure 33 shows the logic which integrates the various lock-detect schemes. When a lock condition is detected, the DRV10983-Q1 device takes action to prevent continuously driving the motor in order to prevent damage to the system or the motor.
In addition to detecting if there is a locked motor condition, the DRV10983-Q1 device also identifies and takes action if there is no motor connected to the system.
Each of the five lock-detect schemes and the no-motor detection can be disabled by respective register bits LockEn[5:0].
When a lock condition is detected, the FaultReg register provides an indication of which of the six different conditions was detected on Lock5 to Lock0. These bits are reset when the motor restarts. The bits in the FaultReg register are set even if the lock detect scheme is disabled.
The DRV10983-Q1 device reacts to either locked-rotor or no-motor-connected conditions by putting the output drivers into a high-impedance state. To prevent the energy in the motor from pumping the supply voltage, the DRV10983-Q1 device incorporates an anti-voltage-surge (AVS) process whenever the output stages transition into the high-impedance state. The AVS function is described in Anti Voltage Suppression Function. After entering the high-impedance state as a result of a fault condition, the system tries to restart after tLOCK_OFF.