SLVSHD9A March   2025  – December 2025 DRV8001-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings Auto
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information RHA package
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 External Components
    4. 7.4 Feature Description
      1. 7.4.1 Heater MOSFET Driver
        1. 7.4.1.1 Heater MOSFET Driver Control
        2. 7.4.1.2 Heater MOSFET Driver Protection
          1. 7.4.1.2.1 Heater SH_HS Internal Diode
          2. 7.4.1.2.2 Heater MOSFET VDS Overcurrent Protection (HEAT_VDS)
          3. 7.4.1.2.3 Heater MOSFET Open Load Detection
      2. 7.4.2 High-Side Drivers
        1. 7.4.2.1 High-side Driver Control
          1. 7.4.2.1.1 High-side Driver PWM Generator
          2. 7.4.2.1.2 Constant Current Mode
          3. 7.4.2.1.3 OUTx HS ITRIP Behavior
          4. 7.4.2.1.4 High-side Drivers - Parallel Outputs
        2. 7.4.2.2 High-side Driver Protection Circuits
          1. 7.4.2.2.1 High-side Drivers Internal Diode
          2. 7.4.2.2.2 High-side Driver Short-circuit Protection
          3. 7.4.2.2.3 High-side Driver Overcurrent Protection
          4. 7.4.2.2.4 High-side Driver Open Load Detection
      3. 7.4.3 Electrochromic Glass Driver
        1. 7.4.3.1 Electrochromic Driver Control
        2. 7.4.3.2 Electrochromic Driver Protection
      4. 7.4.4 Half-bridge Drivers
        1. 7.4.4.1 Half-bridge Control
        2. 7.4.4.2 OUT1 and OUT2 High-side Driver Mode
        3. 7.4.4.3 Half-bridge Register Control
        4. 7.4.4.4 Half-Bridge ITRIP Regulation
        5. 7.4.4.5 Half-bridge Protection and Diagnostics
          1. 7.4.4.5.1 Half-Bridge Off-State Diagnostics (OLP)
          2. 7.4.4.5.2 Half-bridge Open Load Detection
          3. 7.4.4.5.3 Half-Bridge Overcurrent Protection
      5. 7.4.5 Sense Output (IPROPI)
      6. 7.4.6 Protection Circuits
        1. 7.4.6.1 Fault Reset (CLR_FLT)
        2. 7.4.6.2 DVDD Logic Supply Power on Reset (DVDD_POR)
        3. 7.4.6.3 PVDD Supply Undervoltage Monitor (PVDD_UV)
        4. 7.4.6.4 PVDD Supply Overvoltage Monitor (PVDD_OV)
        5. 7.4.6.5 VCP Charge Pump Undervoltage Lockout (VCP_UV)
        6. 7.4.6.6 Thermal Clusters
        7. 7.4.6.7 Watchdog Timer
        8. 7.4.6.8 Fault Detection and Response Summary Table
    5. 7.5 Programming
      1. 7.5.1 Serial Peripheral Interface (SPI)
      2. 7.5.2 SPI Format
      3. 7.5.3 Timing Diagrams
  9. 8  DRV8001-Q1 Register Map
    1. 8.1 DRV8000-Q1_STATUS Registers
    2. 8.2 DRV8000-Q1_CNFG Registers
    3. 8.3 DRV8000-Q1_CTRL Registers
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
    3. 9.3 Initialization Setup
    4. 9.4 Power Supply Recommendations
      1. 9.4.1 Bulk Capacitance Sizing
    5. 9.5 Layout
      1. 9.5.1 Layout Guidelines
      2. 9.5.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Receiving Notification of Documentation Updates
    2. 10.2 Support Resources
    3. 10.3 Trademarks
    4. 10.4 Electrostatic Discharge Caution
    5. 10.5 Glossary
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.4.6.6 Thermal Clusters

As there are multiple drivers and types of drivers on this device, there are multiple dedicated thermal sensors located on chip to monitor key block temperatures on the chip. Each of these sensors, called thermal clusters, measure local die temperature for specific device blocks. These measurements are converted to a current for output on IPROPI pin, used to trigger temperature warnings or to shutdown a specific cluster which is exceeding acceptable temperature range or the entire device.

The device response to thermal cluster warnings can be configured with bit OTSD_MODE in the IC_CNFG1 register:

  • Default mode (OTSD_MODE = 0b): if any cluster reaches thermal shutdown threshold for longer than tOTSD_DG, the entire device is shutoff.
  • Cluster mode (OTSD_MODE = 1b): if a cluster reaches thermal shutdown threshold for longer than tOTSD_DG, only that cluster is shutoff.

There are four zones defined with thermal clusters, shown in the table and diagram below:

DRV8001-Q1 Thermal Sensor Zones Figure 7-18 Thermal Sensor Zones
Table 7-40 Thermal Cluster Locations
Thermal Cluster 1 Thermal Cluster 2 Thermal Cluster 3 Thermal Cluster 4
OUT5, OUT1 and OUT2 OUT3, OUT4 and OUT6 High-side drivers Global and remaining drivers

For each zone, there are comparator-based warnings for two temperature points, 120°C for low and 140°C for high. Bit ZONEX_OTW_X (L or H) is latched in register IC_STAT2. Each warning can be individually disabled with bit ZONEX_OTW_X_DIS in register IC_CNFG2. If overtemperature shutdown occurs, ZONEX_OTSD bit is latched in register IC_STAT2.