SLVSB19D February   2012  – March 2015 DRV8834

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Simplified Schematic
  5. 5 Revision History
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Requirements
    7. 7.7 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Current Control
      2. 8.3.2 Current Recirculation and Decay Modes
      3. 8.3.3 Protection Circuits
        1. 8.3.3.1 Overcurrent Protection (OCP)
        2. 8.3.3.2 Thermal Shutdown (TSD)
        3. 8.3.3.3 Undervoltage Lockout (UVLO)
    4. 8.4 Device Functional Modes
      1. 8.4.1 Phase/Enable Mode
      2. 8.4.2 Indexer Mode
      3. 8.4.3 nSLEEP Operation
  9. 9 Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Sense Resistor
    2. 9.2 Typical Application
      1. 9.2.1 Phase/Enable Mode Driving Two DC Motors
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
          1. 9.2.1.2.1 Motor Voltage
          2. 9.2.1.2.2 Power Dissipation
          3. 9.2.1.2.3 Motor Current Trip Point
        3. 9.2.1.3 Application Curves
      2. 9.2.2 Phase/Enable Mode Driving a Stepper Motor
        1. 9.2.2.1 Design Requirements
        2. 9.2.2.2 Detailed Design Procedure
          1. 9.2.2.2.1 Stepper Motor Speed
          2. 9.2.2.2.2 Current Regulation
          3. 9.2.2.2.3 Decay Modes
        3. 9.2.2.3 Application Curves
      3. 9.2.3 Indexer Mode Driving a Stepper Motor
        1. 9.2.3.1 Design Requirements
        2. 9.2.3.2 Detailed Design Procedures
          1. 9.2.3.2.1 Stepper Motor Speed
          2. 9.2.3.2.2 Current Regulation
          3. 9.2.3.2.3 Decay Modes
        3. 9.2.3.3 Application Curves
      4. 9.2.4 High-Resolution Microstepping Using a Microcontroller to Modulate VREF Signals
        1. 9.2.4.1 Design Requirements
        2. 9.2.4.2 Detailed Design Procedure
        3. 9.2.4.3 Application Curves
  10. 10Power Supply Recommendations
    1. 10.1 Bulk Capacitance
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
    3. 11.3 Thermal Considerations
      1. 11.3.1 Maximum Output Current
      2. 11.3.2 Thermal Protection
      3. 11.3.3 Power Dissipation
      4. 11.3.4 Heatsinking
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Trademarks
    3. 12.3 Electrostatic Discharge Caution
    4. 12.4 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6 Pin Configuration and Functions

PWP Package
24-Pin HTSSOP
Top View
DRV8834 po_pwp_lvsb19.gif
RGE Package
24-Pin VQFN
Top View
DRV8834 po_rge_lvsb19.gif

Pin Functions

PIN I/O DESCRIPTION EXTERNAL COMPONENTS
OR CONNECTIONS
NAME HTSSOP VQFN
POWER AND GROUND
GND 21,
PPAD		 18,
PPAD		 — Device ground Both the GND pin and device PowerPAD must be connected to ground
VM 18, 19 15, 16 — Bridge A power supply Connect to motor supply. A 10-µF (minimum) capacitor to GND is recommended.
VINT 20 17 — Internal supply Bypass to GND with 2.2-μF (minimum), 6.3-V capacitor. Can be used to provide logic high voltage for configuration pins (except nSLEEP).
VREFO 24 21 O Reference voltage output May be connected to AVREF/BVREF inputs. Do not place a bypass capacitor on this pin.
VCP 17 14 O High-side gate drive voltage Connect a 0.01-μF, 16-V (minimum) X7R ceramic capacitor to VM.
CONTROL (INDEXER MODE OR PHASE/ENABLE MODE)
nENBL/AENBL 10 7 I Step motor enable/Bridge A enable Indexer mode: Logic low enables all outputs.
Phase/enable mode: Logic high enables the AOUTx outputs.
Internal pulldown.
STEP/BENBL 11 8 I Step input/Bridge B enable Indexer mode: Rising edge moves indexer to next step.
Phase/enable mode: Logic high enables the BOUTx outputs.
Internal pulldown.
DIR/BPHASE 12 9 I Direction input/Bridge B Phase Indexer mode: Level sets direction of step.
Phase/enable mode: Logic high sets BOUT1 high, BOUT2 low.
Internal pulldown.
M0/APHASE 13 10 I Microstep mode/Bridge A phase Indexer mode: Controls microstep mode (full, half, up to 1/32-step) along with M1.
Phase/enable mode: Logic high sets AOUT1 high, AOUT2 low.
Internal pulldown.
M1 14 11 I Microstep mode/Disable state Indexer mode: Controls microstep mode (full, half, up to 1/32-step) along with M0.
Phase/enable mode: Determines the state of the outputs when xENBL = 0.
Internal pulldown.
CONFIG 15 12 I Device configuration Logic high to put the device in indexer mode. Logic low to put the device into phase/enable mode. State is latched at power up and sleep exit. Internal pulldown.
nSLEEP 1 22 I Sleep mode input Logic high to enable device, logic low to enter low-power sleep mode and reset all internal logic.
AVREF 22 19 I Bridge A current set reference input Reference voltage for AOUT winding current. In Indexer Mode, it should be tied to a reference voltage for the internal DAC (for example, VREFO). In Phase/Enable Mode, an external DAC can drive it for microstepping.
BVREF 23 20 I Bridge B current set reference input Reference voltage for BOUT winding current. In Indexer Mode, it should be tied to a reference voltage for the internal DAC (for example, VREFO). In Phase/Enable Mode, an external DAC can drive it for microstepping.
ADECAY 3 24 I Decay mode for bridge A Determines decay mode for H-Bridge A (or A and B in indexer mode) – slow, fast or mixed decay
BDECAY 2 23 I Decay mode for bridge B Determines decay mode for H-Bridge B – slow, fast or mixed decay
STATUS
nFAULT 16 13 OD Fault output Logic low when in fault condition (overtemp, overcurrent, undervoltage)
OUTPUT
AISEN 5 2 IO Bridge A ground/Isense Connect to current sense resistor for bridge A, or GND if current control not needed
BISEN 8 5 IO Bridge B ground/Isense Connect to current sense resistor for bridge B, or GND if current control not needed
AOUT1 4 1 O Bridge A output 1 Connect to motor winding A
AOUT2 6 3 O Bridge A output 2
BOUT1 9 6 O Bridge B output 1 Connect to motor winding B
BOUT2 7 4 O Bridge B output 2