9.1 Application Information

LVDS drivers and receivers are intended to be used primarily in a point-to-point configurations as is shown in Figure 11. This configuration provides a clean signaling environment for the fast edge rates of the drivers. The receiver is connected to the driver through a balanced media that may be a standard twisted pair cable, a parallel pair cable, or simply PCB traces. Typically, the characteristic differential impedance of the media is in the range of 100 Ω. A termination resistor of 100 Ω (selected to match the media), and is placed as close to the receiver input pins as possible. The termination resistor converts the driver output current (current mode) into a voltage that is detected by the receiver. Other configurations are possible such as a multi-receiver configuration, but the effects of a mid-stream connector(s), cable stub(s), and other impedance discontinuities as well as ground shifting, noise margin limits, and total termination loading must be taken into account. The TRI-STATE function allows the device outputs to be disabled, thus obtaining an even lower power state when the transmission of data is not required. The DS90LV049H has a flow-through pinout that allows for easy PCB layout. The LVDS signals on one side of the device allow for easy matching of the electrical lengths for the differential pair trace lines between the driver and the receiver, and the signal placement allows the trace lines to be close together to couple noise as common-mode. Noise isolation is achieved with the LVDS signals on one side of the device and the TTL signals on the other side.