SNLS200B September   2005  – January 2019 DS90LV049H


  1. Features
  2. Applications
  3. Description
    1.     Device Images
      1.      Dual-In-Line
      2.      Functional Diagram
  4. Revision History
  5. Pin Configuration and Functions
    1.     Pin Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  7. Parameter Measurement Information
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 DS90LV049H LVDS Driver and Receiver Functionality
      2. 8.3.2 Termination
      3. 8.3.3 Fail-Safe Feature
    4. 8.4 Device Functional Modes
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. Power Decoupling Recommendations
        2. PCB Transmission Lines
        3. Input Fail-Safe Biasing
        4. Probing LVDS Transmission Lines on PCB
        5. Interconnecting Media
      3. 9.2.3 Application Curve
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
      1. 11.1.1 Microstrip vs. Stripline Topologies
      2. 11.1.2 Dielectric Type and Board Construction
      3. 11.1.3 Recommended Stack Layout
      4. 11.1.4 Separation Between Traces
      5. 11.1.5 Crosstalk and Ground Bounce Minimization
      6. 11.1.6 Decoupling
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Related Documentation
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Community Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information


The DS90LV049H integrates both low-voltage differential signaling (LVDS) line drivers, with a balanced current source design, and LVDS line receivers into a single package. This device operates from a single power supply that is nominally 3.3 V, but the supply can be as low as 3.0 V and as high as 3.6 V. The input signal to the DS90LV049H LVDS line drivers is an LVCMOS/LVTTL signal. The output of the DS90LV049H LVDS line drivers is a differential signal complying with the LVDS standard (TIA/EIA-644). The input to the DS90LV049H LVDS line receivers is a differential signal complying with the LVDS Standard (TIA/EIA-644) and the output is a 3.3-V LVCMOS/LVTTL signal. The differential output signal of the DS90LV049H LVDS line drivers operates with a signal level of 350 mV, nominally, at a common-mode voltage of 1.2 V. This low differential output voltage results in low electromagnetic interference (EMI). The differential input signal of the DS90LV049H LVDS line receivers operates with a signal level of 350 mV, nominally, at a common-mode voltage of 1.2 V. The differential nature of the LVDS outputs and inputs provides immunity to common-mode coupled signals (noise) that the driven/received signal may experience.

The DS90LV049H is primarily used in point-to-point configurations, as seen in Figure 11. This configuration provides a clean signaling environment for the fast edge rates of the DS90LV049H and other LVDS components. The DS90LV049H is connected through a balanced media which may be a standard twisted-pair cable, a parallel pair cable, or simply PCB traces to a LVDS receiver. Typically, the characteristic differential impedance of the media is in the range of 100 Ω. The DS90LV049H device is intended to drive a 100-Ω transmission line. The 100-Ω termination resistor is selected to match the media and is placed as close to the LVDS receiver input pins as possible.