SLVSH27B April   2023  – December 2025 ESD451

PRODUCTION DATA  

  1.   1
  2. 1Features
  3. 2Applications
  4. 3Description
  5. 4Pin Configuration and Functions
  6. 5Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings—JEDEC Specification
    3. 5.3 ESD Ratings—IEC Specification
    4. 5.4 Recommended Operating Conditions
    5. 5.5 Thermal Information
    6. 5.6 Electrical Characteristics
    7. 5.7 Typical Characteristics
  7. 6Application and Implementation
    1. 6.1 Application Information
  8. 7Device and Documentation Support
    1. 7.1 Documentation Support
      1. 7.1.1 Related Documentation
    2. 7.2 Receiving Notification of Documentation Updates
    3. 7.3 Support Resources
    4. 7.4 Trademarks
    5. 7.5 Electrostatic Discharge Caution
    6. 7.6 Glossary
  9. 8Revision History
  10. 9Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • DPL|2
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5.5 Thermal Information

THERMAL METRIC (1) ESD451 UNIT
DPL (DFN0603) DPY (DFN1006)
2 PINS 2 PINS
RθJA Junction-to-ambient thermal resistance 356.9 305.0 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 201.2 179.5 °C/W
RθJB Junction-to-board thermal resistance 136.4 121.4 °C/W
ΨJT Junction-to-top characterization parameter 2.6 16.5 °C/W
ΨJB Junction-to-board characterization parameter 135.9 120.3 °C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance NA NA °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application note.